Patents by Inventor Chih-Chen Li

Chih-Chen Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11965217
    Abstract: A method and a kit for detecting Mycobacterium tuberculosis are provided. The method includes a step of performing a nested qPCR assay to a specimen. The nested qPCR assay includes a first round of amplification using external primers and a second round of amplification using internal primers and a probe. The external primers have sequences of SEQ ID NOs. 1 and 2, and the internal primers and the probe have sequences of SEQ ID NOs. 3 to 5.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yi-Chen Li, Chih-Cheng Tsou, Min-Hsien Wu, Hsin-Yao Wang, Chien-Ru Lin
  • Patent number: 11956788
    Abstract: Methods, systems, and devices for wireless communications are described. A transmitting device may transmit an expiration indication to a receiving device as part of a scheduling message for a transport block. The expiration indication may provide information related to an expiration time for the transport block. If the expiration time is reached prior to successful reception by a receiving device, the receiving device may assume that the transport block has expired and may refrain from transmitting a retransmission grant, or may empty a hybrid automatic repeat request (HARM) buffer associated with the transport block. If the transmitting device fails to successfully receive an indication from the receiving device of a successful reception of the transport block prior to the expiration period, the transmitting device may also assume that the transport block has expired.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: April 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Yang, Jing Jiang, Wanshi Chen, Peter Gaal, Tingfang Ji, Chih-Ping Li, Seyedkianoush Hosseini
  • Publication number: 20230402915
    Abstract: A down-converted voltage regulator is provided. The first energy storage element provides a pre-charged voltage between a connection terminal and a ground terminal during the first phase. The second energy storage element has a first terminal, and it has a second terminal coupled to the output terminal of the voltage regulator. The third energy storage element is coupled between the output terminal of the voltage regulator and the ground terminal. During the first phase, the first terminal of the second energy storage element is coupled to the first energy storage element through the connection terminal to receive the pre-charged voltage. During the second phase, the first energy storage element is coupled between the input terminal and the output terminal of the voltage regulator to be pre-charged to store the pre-charged voltage, and the first terminal of the second energy storage element is coupled to the ground terminal.
    Type: Application
    Filed: December 9, 2022
    Publication date: December 14, 2023
    Inventors: Chih-Chen LI, Jin-Yan SYU
  • Publication number: 20230223849
    Abstract: A feedback circuit of a voltage regulator with adaptive voltage positioning (AVP) includes a first sensing circuit, a second sensing circuit, a third sensing circuit, and a processing circuit. The first sensing circuit generates a first feedback signal that provides information of an inductor current of the voltage regulator. The second sensing circuit generates a second feedback signal that provides information of an output voltage of the voltage regulator. The third sensing circuit generates a third feedback signal that provides information of a capacitor current of an output capacitor of the voltage regulator. The processing circuit generates a control voltage signal according to the first feedback signal, the second feedback signal, and the third feedback signal, and outputs the control voltage signal to a controller circuit of the voltage regulator for regulating the output voltage of the voltage regulator.
    Type: Application
    Filed: November 14, 2022
    Publication date: July 13, 2023
    Applicant: MEDIATEK INC.
    Inventors: Chih-Chen Li, Jin-Yan Syu
  • Publication number: 20230223851
    Abstract: A transient boost controller for controlling a transient boost circuit of a voltage regulator includes a feedback circuit and a processing circuit. The feedback circuit obtains a first feedback signal and a second feedback signal sensed from an output capacitor of the voltage regulator, wherein the first feedback signal is derived from a voltage signal at a first plate of the output capacitor, and the second feedback signal is derived from a voltage signal at a second plate of the output capacitor. The processing circuit generates a detection result according to the first feedback signal and the second feedback signal, and outputs the detection result for controlling the transient boost circuit of the voltage regulator.
    Type: Application
    Filed: November 15, 2022
    Publication date: July 13, 2023
    Applicant: MEDIATEK INC.
    Inventors: Jin-Yan Syu, Kuan-Yu Fang, Chih-Chen Li
  • Patent number: 11095222
    Abstract: A high efficiency converter is provided. The converter can be used in applications requiring fast transient response under a first loading condition, and high efficiency under a second loading condition. The converter converts one or more input voltages via two or more conversion paths. Each of the two or more conversion paths corresponds to a different loading condition which indicates a magnitude of a load driven by the converter (e.g., heavy or light), and a target transient response of the load (e.g., fast or slow). A conversion path for a heavy or fast loading condition converts an input voltage directly to a target output voltage. A conversion path for a light or slow loading condition includes a two-stage architecture.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: August 17, 2021
    Assignee: MediaTek Inc.
    Inventors: Chih-Chen Li, Yen-Hsun Hsu, Tzu-Chi Huang
  • Patent number: 10784763
    Abstract: An inverter circuit may include an inverter, a driver coupled to the inverter, and a slew rate control module configured to modify a slew rate of the driver. The slew rate may be modified based on a magnitude of a load driven by the inverter circuit. The magnitude of the load driven by the inverter circuit may be indicated by a current representing a load current or a voltage representing an input voltage. The slew rate may also be modified based on a mode configuration of the inverter circuit.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: September 22, 2020
    Assignee: MediaTek Inc.
    Inventors: Kuan-Yu Chu, HuaChiang Huang, Chih-Chen Li, Shan-Fong Hong
  • Patent number: 10763668
    Abstract: A converter is provided. The converter is capable of generating a loading current at an output node. The converter includes a high efficiency power channel and a fast transient response channel. The high efficiency power channel and the fast transient response channel share an inductor that is coupled to the output node. The high efficiency power channel has an additional inductor that is connected in series with the inductor coupled to the output node.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: September 1, 2020
    Assignee: MediaTek Inc.
    Inventors: Hua-Chiang Huang, Chih-Chen Li
  • Patent number: 10396771
    Abstract: A voltage supply circuit is provided. The voltage supply circuit is capable of generating a loading current at an output node. The voltage supply circuit includes a plurality of inductors and a plurality of driver circuits. The plurality of inductors are coupled to the output node. Each inductor has an inductance value. The plurality of driver circuits are coupled to the plurality of inductors, respectively. The inductance values of at least two inductors among the plurality of inductors are greater than the inductance value of another inductor.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: August 27, 2019
    Assignee: MediaTek Inc.
    Inventors: Chih-Chen Li, Kuan-Yu Fang, Kuan-Yu Chu, Yen-Hsun Hsu
  • Publication number: 20190131789
    Abstract: A converter is provided. The converter is capable of generating a loading current at an output node. The converter includes a high efficiency power channel and a fast transient response channel. The high efficiency power channel and the fast transient response channel share an inductor that is coupled to the output node. The high efficiency power channel has an additional inductor that is connected in series with the inductor coupled to the output node.
    Type: Application
    Filed: August 14, 2018
    Publication date: May 2, 2019
    Applicant: MediaTek Inc.
    Inventors: Hua-Chiang Huang, Chih-Chen Li
  • Publication number: 20190089252
    Abstract: A high efficiency converter is provided. The converter can be used in applications requiring fast transient response under a first loading condition, and high efficiency under a second loading condition. The converter converts one or more input voltages via two or more conversion paths. Each of the two or more conversion paths corresponds to a different loading condition which indicates a magnitude of a load driven by the converter (e.g., heavy or light), and a target transient response of the load (e.g., fast or slow). A conversion path for a heavy or fast loading condition converts an input voltage directly to a target output voltage. A conversion path for a light or slow loading condition includes a two-stage architecture.
    Type: Application
    Filed: April 25, 2018
    Publication date: March 21, 2019
    Applicant: MediaTek Inc.
    Inventors: Chih-Chen Li, Yen-Hsun Hsu, Tzu-Chi Huang
  • Patent number: 10211732
    Abstract: An SMPS (Switched Mode Power Supply) circuit includes a first switch element, a second switch element, an inductor, a capacitor, a current sensor, a current comparator, and a controller. The first switch element is coupled between a first power node and a switch node. The second switch element is coupled between the switch node and a second power node. The inductor is coupled between the switch node and an output node. The capacitor is coupled between the output node and the second power node. The current sensor detects a switch current through the second switch element. The current comparator compares the switch current with a first reference current to generate a comparison signal. The controller controls the first switch element and the second switch element according to the comparison signal and a switch voltage at the switch node. The invention can avoid an excessive SMPS output current.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: February 19, 2019
    Assignee: MediaTek Inc.
    Inventors: Chih-Chen Li, Kuan-Yu Chu, Shan-Fong Hong
  • Patent number: 10211723
    Abstract: The invention provides a regulator for DC-DC hybrid-mode power regulation of an output voltage and a load current. The regulator may include a controller and a back-end circuit. The controller controls the output voltage and the load current by charging a connection node when a driving signal is at an on-level, and stopping charging the connection node when the driving signal is at an off-level. The back-end circuit is coupled to the controller, capable of switching between a first mode and a second mode to control transition of the driving signal by different schemes. The back-end circuit switches from the second mode to the first mode when a mode-switch criterion is satisfied, and whether the mode-switch criterion is satisfied is independent of a measurement of the output voltage.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: February 19, 2019
    Assignee: MEDIATEK INC.
    Inventors: Shan-Fong Hong, Chih-Chen Li, Kuan-Yu Chu, Chien-Wei Kuan, Yen-Hsun Hsu
  • Publication number: 20180262097
    Abstract: An inverter circuit may include an inverter, a driver coupled to the inverter, and a slew rate control module configured to modify a slew rate of the driver. The slew rate may be modified based on a magnitude of a load driven by the inverter circuit. The magnitude of the load driven by the inverter circuit may be indicated by a current representing a load current or a voltage representing an input voltage. The slew rate may also be modified based on a mode configuration of the inverter circuit.
    Type: Application
    Filed: March 5, 2018
    Publication date: September 13, 2018
    Applicant: MediaTek Inc.
    Inventors: Kuan-Yu Chu, HuaChiang Huang, Chih-Chen Li, Shan-Fong Hong
  • Publication number: 20180205371
    Abstract: A voltage supply circuit is provided. The voltage supply circuit is capable of generating a loading current at an output node. The voltage supply circuit includes a plurality of inductors and a plurality of driver circuits. The plurality of inductors are coupled to the output node. Each inductor has an inductance value. The plurality of driver circuits are coupled to the plurality of inductors, respectively. The inductance values of at least two inductors among the plurality of inductors are greater than the inductance value of another inductor.
    Type: Application
    Filed: March 14, 2018
    Publication date: July 19, 2018
    Applicant: MediaTek Inc.
    Inventors: Chih-Chen Li, Kuan-Yu Fang, Kuan-Yu Chu, Yen-Hsun Hsu
  • Patent number: 9899920
    Abstract: A voltage regulator includes a plurality of output stages and a controller. The plurality of output stages are arranged for selectively enabling to generate output voltages and output currents or not according to a plurality of control signals, respectively. The controller is arranged for sensing the output currents of the output stages, and generating the control signals according to the sensed output currents. When the controller generates the control signals to reduce a quantity of the enabled output stages, the controller determines whether a summation of the sensed output currents is greater than a first threshold or not to determine whether to enable more output stages, then a period of time later, the controller selectively determines whether the summation of the sensed output currents is greater than a second threshold or not to determine whether to enable more output stages, wherein the second threshold is lower than the first threshold.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: February 20, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chien-Wei Kuan, Yen-Hsun Hsu, Shan-Fong Hong, Chih-Chen Li, Yu-Te Chao
  • Publication number: 20170310211
    Abstract: The invention provides a regulator for DC-DC hybrid-mode power regulation of an output voltage and a load current. The regulator may include a controller and a back-end circuit. The controller controls the output voltage and the load current by charging a connection node when a driving signal is at an on-level, and stopping charging the connection node when the driving signal is at an off-level. The back-end circuit is coupled to the controller, capable of switching between a first mode and a second mode to control transition of the driving signal by different schemes. The back-end circuit switches from the second mode to the first mode when a mode-switch criterion is satisfied, and whether the mode-switch criterion is satisfied is independent of a measurement of the output voltage.
    Type: Application
    Filed: October 26, 2016
    Publication date: October 26, 2017
    Inventors: Shan-Fong Hong, Chih-Chen Li, Kuan-Yu Chu, Chien-Wei Kuan, Yen-Hsun Hsu
  • Publication number: 20170077813
    Abstract: An SMPS (Switched Mode Power Supply) circuit includes a first switch element, a second switch element, an inductor, a capacitor, a current sensor, a current comparator, and a controller. The first switch element is coupled between a first power node and a switch node. The second switch element is coupled between the switch node and a second power node. The inductor is coupled between the switch node and an output node. The capacitor is coupled between the output node and the second power node. The current sensor detects a switch current through the second switch element. The current comparator compares the switch current with a first reference current to generate a comparison signal. The controller controls the first switch element and the second switch element according to the comparison signal and a switch voltage at the switch node. The invention can avoid an excessive SMPS output current.
    Type: Application
    Filed: August 18, 2016
    Publication date: March 16, 2017
    Inventors: Chih-Chen LI, Kuan-Yu CHU, Shan-Fong HONG
  • Publication number: 20170077811
    Abstract: A voltage regulator includes a plurality of output stages and a controller. The plurality of output stages are arranged for selectively enabling to generate output voltages and output currents or not according to a plurality of control signals, respectively. The controller is arranged for sensing the output currents of the output stages, and generating the control signals according to the sensed output currents. When the controller generates the control signals to reduce a quantity of the enabled output stages, the controller determines whether a summation of the sensed output currents is greater than a first threshold or not to determine whether to enable more output stages, then a period of time later, the controller selectively determines whether the summation of the sensed output currents is greater than a second threshold or not to determine whether to enable more output stages, wherein the second threshold is lower than the first threshold.
    Type: Application
    Filed: June 2, 2016
    Publication date: March 16, 2017
    Inventors: Chien-Wei Kuan, Yen-Hsun Hsu, Shan-Fong Hong, Chih-Chen Li, Yu-Te Chao
  • Publication number: 20130176008
    Abstract: The present invention discloses a soft start circuit for a power supply device comprising an external P-type transistor for charging an output capacitor to provide an output voltage. The soft start circuit includes a current source, for providing a discharge current; and a disabling means, coupled to the current source, for discharging an equivalent total parasitic capacitor of the external P-type transistor during an activation period according to the discharge current.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 11, 2013
    Inventors: Chih-Chen Li, Chin-Hsun Chen