Patents by Inventor Chih-Cheng Chin
Chih-Cheng Chin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7722997Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.Type: GrantFiled: November 14, 2007Date of Patent: May 25, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Ming Chang, Chung-Hsing Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin, Chin-Hsiang Lin
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Patent number: 7697114Abstract: Disclosed is a lithography system. The lithography system includes a source designed to provide energy; an imaging system configured to direct the energy onto a substrate to form a predefined image thereon, and defining an optical axis; and an aperture incorporated with the imaging system, the aperture having a plurality of transmitting regions defined along radial axis not parallel to the optical axis, and each transmitting region operable to transmit the energy with adjustable intensity.Type: GrantFiled: June 14, 2006Date of Patent: April 13, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Ming Chang, Wen-Chuan Wang, Chih-Cheng Chin, Chi-Lun Lu, Sheng-Chi Chin, Hung Chang Hsieh
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Patent number: 7651824Abstract: A method for compensating critical dimension (CD) variations of patterns of a substrate, by the correcting the CD of the corresponding photomask is disclosed. First, a light and a main photomask are provided. Second, an auxiliary photomask including an auxiliary transparent substrate and a shading element within the auxiliary transparent substrate is provided. Next the light passes through the auxiliary photomask and main photomask in order for compensating CD variations of patterns corresponding to main photomask.Type: GrantFiled: December 7, 2008Date of Patent: January 26, 2010Assignee: Nanya Technology Corp.Inventors: Hsuan-Ko Chen, Mei-Li Wang, Chih-Cheng Chin, Pei-Cheng Fan
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Patent number: 7383530Abstract: A method and system is disclosed for examining mask pattern fidelity. A mask picture is generated from a first mask with a first OPC model applied to a mask design. The mask picture is converted into a mask based simulation file. A first simulation is conducted under a first set of predetermined lithography processing conditions using the converted simulation file to generate one or more files of a first set representing wafer photo resist profile thereof. The first OPC model is applied to the mask design in the database mask file. A second simulation is conducted under the first set of predetermined lithography processing conditions using the OPCed mask design to generate one or more files of a second set representing wafer photo resist profile thereof. The first and second sets of files are evaluated for inspecting mask fidelity.Type: GrantFiled: April 13, 2007Date of Patent: June 3, 2008Assignee: Taiwan Semiconductor Manufacturing Company, LtdInventors: Wen-Chuan Wang, Shih-Ming Chang, Chih-Cheng Chin, Chi-Lun Lu, Sheng-Chi Chin, Hung-Chang Hsieh
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Publication number: 20080113279Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.Type: ApplicationFiled: November 14, 2007Publication date: May 15, 2008Inventors: Shih-Ming Chang, Chung-Hsing Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin, Chin-Hsiang Lin
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Patent number: 7316872Abstract: A patterning device for implementing a pattern on a substrate includes a main pattern feature and a sacrificial pattern feature. Both the main pattern feature and the sacrificial pattern feature are transferable to an overlying layer on the substrate. The sacrificial pattern feature is positioned a distance from the main pattern feature and is configured to have a dimension less than an etching bias of an etching process. The etching process is capable of transferring the main pattern feature to an underlying layer, such that the sacrificial pattern feature adjusts an etching behavior of the main pattern feature and is eliminated from the underlying layer.Type: GrantFiled: October 17, 2005Date of Patent: January 8, 2008Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Ming Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin
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Patent number: 7312021Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.Type: GrantFiled: March 3, 2004Date of Patent: December 25, 2007Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Ming Chang, Chung-Hsing Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin, Chin-Hsiang Lin
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Publication number: 20070291244Abstract: Disclosed is a lithography system. The lithography system includes a source designed to provide energy; an imaging system configured to direct the energy onto a substrate to form a predefined image thereon, and defining an optical axis; and an aperture incorporated with the imaging system, the aperture having a plurality of transmitting regions defined along radial axis not parallel to the optical axis, and each transmitting region operable to transmit the energy with adjustable intensity.Type: ApplicationFiled: June 14, 2006Publication date: December 20, 2007Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Ming CHANG, Wen-Chuan WANG, Chih-Cheng CHIN, Chi-Lun LU, Sheng-Chi CHIN, Hung Chang Hsieh
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Publication number: 20070250805Abstract: A method and system is disclosed for examining mask pattern fidelity. A mask picture is generated from a first mask with a first OPC model applied to a mask design. The mask picture is converted into a mask based simulation file. A first simulation is conducted under a first set of predetermined lithography processing conditions using the converted simulation file to generate one or more files of a first set representing wafer photo resist profile thereof. The first OPC model is applied to the mask design in the database mask file. A second simulation is conducted under the first set of predetermined lithography processing conditions using the OPCed mask design to generate one or more files of a second set representing wafer photo resist profile thereof. The first and second sets of files are evaluated for inspecting mask fidelity.Type: ApplicationFiled: April 13, 2007Publication date: October 25, 2007Inventors: Wen-Chuan Wang, Shih-Ming Chang, Chih-Cheng Chin, Chi-Lun Lu, Sheng-Chi Chin, Hung-Chang Hsieh
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Publication number: 20070087571Abstract: A patterning device for implementing a pattern on a substrate includes a main pattern feature and a sacrificial pattern feature. Both the main pattern feature and the sacrificial pattern feature are transferable to an overlying layer on the substrate. The sacrificial pattern feature is positioned a distance from the main pattern feature and is configured to have a dimension less than an etching bias of an etching process. The etching process is capable of transferring the main pattern feature to an underlying layer, such that the sacrificial pattern feature adjusts an etching behavior of the main pattern feature and is eliminated from the underlying layer.Type: ApplicationFiled: October 17, 2005Publication date: April 19, 2007Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Ming Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin
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Patent number: 7005219Abstract: A method for repairing a defective photomask having contained therein a minimum of one defect within a defective pattern employs a non-defective photomask for purposes of photoexposing a photoresist layer formed upon the defective photomask such as to form a patterned photoresist layer which leaves exposed the minimum of one defect. The minimum of one defect may then be repaired with the patterned photoresist layer in place as a repair mask. The method also provides for use of a non-defective pattern region within a defective photomask in a like fashion for repairing a defective pattern region within the same photomask. The method may be extended to repairing defective microelectronic products.Type: GrantFiled: May 8, 2003Date of Patent: February 28, 2006Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Cheng Chin, Shih-Ming Chang
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Patent number: 6982135Abstract: A method for transferring a pattern from a mask to a substrate (or wafer), comprises dividing a mask generation data file into a plurality of segments. The segments include a main pattern area and a stitching area. Each stitching area contains a respective common pattern. An image of an illuminated portion of the main pattern area is formed. Connection ends of the segments in a substrate area (or wafer area) are illuminated with an illumination beam. An image of the illuminated portion of the main pattern area is formed, and a halftone gray level dosage distribution is produced in the substrate area (or wafer area) corresponding to the common pattern. The common patterns of adjacent segments substantially overlap in the substrate area (or wafer area).Type: GrantFiled: March 28, 2003Date of Patent: January 3, 2006Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Hsing Chang, Chien-Hung Lin, Burn J. Lin, Chia-Hui Lin, Chih-Cheng Chin, Chin-Hsiang Lin, Fu-Jye Liang, Jeng-Horng Chen, Bang-Ching Ho
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Publication number: 20050147895Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.Type: ApplicationFiled: March 3, 2004Publication date: July 7, 2005Inventors: Shih-Ming Chang, Chung-Hsing Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin, Chin-Hsiang Lin
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Publication number: 20040265704Abstract: A multiple-exposure defect elimination process for semiconductor devices being fabricated on semiconductor wafers using photomask parts, including one mask part that is defective, is disclosed. A semiconductor wafer is exposed to a first mask part that is at least partially defective, and then is exposed to a second mask part corresponding to the first mask part but that is at least substantially free from defects or with defects at different locations. The mask parts may be on the same or different photomasks, and have the same layout for a semiconductor device that is being fabricated. Furthermore, the semiconductor wafer may be exposed to the second or other additional mask parts one or more additional times.Type: ApplicationFiled: June 26, 2003Publication date: December 30, 2004Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Ming Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin, Chin-Hsiang Lin
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Publication number: 20040225488Abstract: A method and system is disclosed for examining mask pattern fidelity. First, a mask picture is generated from a first mask with a first OPC model applied to a mask design thereon. The mask picture is then converted into a mask based simulation file. A first simulation is conducted under a first set of predetermined lithography processing conditions using the converted simulation file to generate one or more files of a first set representing wafer photo resist profile thereof. On the other hand, a mask design in a database mask file is identified which was used for generating the first mask. The first OPC model is applied to the mask design in the database mask file. A second simulation is then conducted under the first set of predetermined lithography processing conditions using the OPCed mask design to generate one or more files of a second set representing wafer photo resist profile thereof. The first and second sets of files are then evaluated together for the purpose of inspecting mask fidelity.Type: ApplicationFiled: September 19, 2003Publication date: November 11, 2004Inventors: Wen-Chuan Wang, Shih-Ming Chang, Chih-Cheng Chin, Chi-Lun Lu, Sheng-Chi Chin, Hung-Chang Hsieh
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Publication number: 20040224238Abstract: A method for repairing a defective photomask having contained therein a minimum of one defect within a defective pattern employs a non-defective photomask for purposes of photoexposing a photoresist layer formed upon the defective photomask such as to form a patterned photoresist layer which leaves exposed the minimum of one defect. The minimum of one defect may then be repaired with the patterned photoresist layer in place as a repair mask. The method also provides for use of a non-defective pattern region within a defective photomask in a like fashion for repairing a defective pattern region within the same photomask. The method may be extended to repairing defective microelectronic products.Type: ApplicationFiled: May 8, 2003Publication date: November 11, 2004Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Cheng Chin, Shih-Ming Chang
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Publication number: 20040191643Abstract: A method for transferring a pattern from a mask to a substrate (or wafer), comprises dividing a mask generation data file into a plurality of segments. The segments include a main pattern area and a stitching area. Each stitching area contains a respective common pattern. An image of an illuminated portion of the main pattern area is formed. Connection ends of the segments in a substrate area (or wafer area) are illuminated with an illumination beam. An image of the illuminated portion of the main pattern area is formed, and a halftone gray level dosage distribution is produced in the substrate area (or wafer area) corresponding to the common pattern. The common patterns of adjacent segments substantially overlap in the substrate area (or wafer area).Type: ApplicationFiled: March 28, 2003Publication date: September 30, 2004Inventors: Chung-Hsing Chang, Chien-Hung Lin, Burn J. Lin, Chia-Hui Lin, Chih-Cheng Chin, Chin-Hsiang Lin, Fu-Jye Liang, Jeng-Horng Chen, Bang-Ching Ho
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Patent number: 6653029Abstract: The use of dual-focused ion beams for semiconductor image scanning and mask repair is disclosed. A mask is imaged with either a focused negative ion beam, such as a focused oxygen ion beam, or a focused positive ion beam, such as a focused gallium ion beam. Mask imaging is also referred to as image scanning. Defects in the mask are repaired with the ion beam not used in imaging of the mask. Also disclosed is image scanning being performed with the focused negative ion beam to neutralize potential charge buildup, and mask repair being performed with the focused positive ion beam. An apparatus is disclosed that has a negative ion mechanism supplying negative ions, a positive ion mechanism supplying positive ions, a filter to select the desired ratio of the negative to the positive ions, and an aiming mechanism to focus the ions onto the mask.Type: GrantFiled: August 10, 2001Date of Patent: November 25, 2003Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.Inventors: Chuan-Yuan Lin, Chang-Cheng Hung, Chih Cheng Chin, Chin Hsiang Lin
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Publication number: 20030031961Abstract: The use of dual-focused ion beams for semiconductor image scanning and mask repair is disclosed. A mask is imaged with either a focused negative ion beam, such as a focused oxygen ion beam, or a focused positive ion beam, such as a focused gallium ion beam. Mask imaging is also referred to as image scanning. Defects in the mask are repaired with the ion beam not used in imaging of the mask. Also disclosed is image scanning being performed with the focused negative ion beam to neutralize potential charge buildup, and mask repair being performed with the focused positive ion beam. An apparatus is disclosed that has a negative ion mechanism supplying negative ions, a positive ion mechanism supplying positive ions, a filter to select the desired ratio of the negative to the positive ions, and an aiming mechanism to focus the ions onto the mask.Type: ApplicationFiled: August 10, 2001Publication date: February 13, 2003Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chuan-Yuan Lin, Chang-Cheng Hung, Chih Cheng Chin, Chin Hsiang Lin