Patents by Inventor Chih-Chieh Wu

Chih-Chieh Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240176093
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
  • Patent number: 11996481
    Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Chih-Hao Wang, Kuo-Cheng Chiang, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu, Yu-Ming Lin, Chung-Wei Hsu
  • Publication number: 20240170343
    Abstract: A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 23, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sai-Hooi YEONG, Bo-Feng YOUNG, Chi-On CHUI, Chih-Chieh YEH, Cheng-Hsien WU, Chih-Sheng CHANG, Tzu-Chiang CHEN, I-Sheng CHEN
  • Publication number: 20240170506
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first pixel region and a second pixel region within a substrate. A first recess region is disposed along a back-side of the substrate within the first pixel region. The back-side of the substrate within the first pixel region is asymmetric about a center of the first pixel region in a cross-sectional view. A second recess region is disposed along the back-side of the substrate and within the second pixel region. The back-side of the substrate within the second pixel region is asymmetric about a center of the second pixel region in the cross-sectional view. The first recess region and the second recess region are substantially symmetric about a vertical line laterally between the first pixel region and the second pixel region.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11978802
    Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Wei Hsu, Chih-Hao Wang, Huan-Chieh Su, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu
  • Patent number: 11964811
    Abstract: A liquid storage tank includes a housing, a piston located in the housing, a cover, an elastic element, and an outlet pipe. The cover is attached to the housing and has a support post extending toward the piston. The piston, the housing, and the cover define a tank chamber. The tank chamber is filled with cooling liquid. The elastic element is connected with the tank hosing and the piston. The elastic element is free from contact with the cooling liquid. The outlet pipe communicates with the tank chamber. An extension direction of an opening of the outlet pipe is not parallel to a direction of movement of the elastic element. When the cooling liquid is decreased, the piston compressed the tank chamber such that the elastic element is released. The tank chamber is continuously compressed by pairing the elastic element and the piston.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Jei Huang, Wei-Fang Wu, Chia-Ying Hsu, Chih-Chieh Lu
  • Publication number: 20240113143
    Abstract: Various embodiments of the present disclosure are directed towards an imaging device including a first image sensor element and a second image sensor element respectively comprising a pixel unit disposed within a semiconductor substrate. The first image sensor element is adjacent to the second image sensor element. A first micro-lens overlies the first image sensor element and is laterally shifted from a center of the pixel unit of the first image sensor element by a first lens shift amount. A second micro-lens overlies the second image sensor element and is laterally shifted from a center of the pixel unit of the second image sensor element by a second lens shift amount different from the first lens shift amount.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 4, 2024
    Inventors: Cheng Yu Huang, Wen-Hau Wu, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Chih-Kung Chang
  • Publication number: 20240105778
    Abstract: A semiconductor device includes a fin extending from a substrate. The fin has a source/drain region and a channel region. The channel region includes a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer and vertically separated from the first semiconductor layer by a spacing area. A high-k dielectric layer at least partially wraps around the first semiconductor layer and the second semiconductor layer. A metal layer is formed along opposing sidewalls of the high-k dielectric layer. The metal layer includes a first material. The spacing area is free of the first material.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: I-Sheng CHEN, Yee-Chia YEO, Chih Chieh YEH, Cheng-Hsien WU
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240088182
    Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Chien Yu, Ting-Cheng Chang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20240075082
    Abstract: Provided is a composition including a lactic acid bacterium and a carrier thereof for prophylaxis or treatment of an allergy. The lactic acid bacterium is Lactobacillus paragasseri, such as Lactobacillus paragasseri BBM171 deposited under DSMZ Accession No. DSM 34311. Also provided is a method for preventing or treating an allergy in a subject that includes administering an effective amount of the composition of Lactobacillus paragasseri to the subject.
    Type: Application
    Filed: August 24, 2023
    Publication date: March 7, 2024
    Inventors: Ying-Chieh Tsai, Yu-Hsuan Wei, Chih-Chieh Hsu, Chien-Chen Wu
  • Patent number: 11923386
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first photodetector disposed in a first pixel region of a semiconductor substrate and a second photodetector disposed in a second pixel region of the semiconductor substrate. The second photodetector is laterally separated from the first photodetector. A first diffuser is disposed along a back-side of the semiconductor substrate and over the first photodetector. A second diffuser is disposed along the back-side of the semiconductor substrate and over the second photodetector. A first midline of the first pixel region and a second midline of the second pixel region are both disposed laterally between the first diffuser and the second diffuser.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 11923252
    Abstract: A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sai-Hooi Yeong, Bo-Feng Young, Chi-On Chui, Chih-Chieh Yeh, Cheng-Hsien Wu, Chih-Sheng Chang, Tzu-Chiang Chen, I-Sheng Chen
  • Patent number: 9904642
    Abstract: A detection circuit of Universal Serial Bus (USB) is provided. A port of the USB has a first configuration channel pin and a second configuration channel pin, and the first and second configuration channel pins are disposed on opposite sides. The detection circuit includes a switch unit and a detection unit. The switch unit is coupled to the first and second configuration channel pins to sequentially provide a first voltage level of the first configuration channel pin and a second voltage level of the second configuration channel pin. The detection unit is coupled to the switch unit and correspondingly provides a state reference signal according to the first and second voltage levels.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: February 27, 2018
    Assignee: ITE TECH. INC.
    Inventors: Yi-Chung Chou, Dong-Shan Chen, Chih-Chieh Wu
  • Patent number: 9557028
    Abstract: A lens includes a lens portion, an outer periphery and a prism portion. The lens portion is disposed at a middle portion of the lens, has an outline that is non-circular, and includes at least one curved surface. The outer periphery surrounds the lens portion. The prism portion is disposed between the lens portion and the outer periphery, and includes at least two undulated sections. Each undulated section has at least one undulated surface.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: January 31, 2017
    Assignee: Genius Electronic Optical Co., Ltd.
    Inventors: Chih-Chieh Wu, Ya-Chieh Ho, Chun-Yi Yeh
  • Publication number: 20170017598
    Abstract: A detection circuit of Universal Serial Bus (USB) is provided. A port of the USB has a first configuration channel pin and a second configuration channel pin, and the first and second configuration channel pins are disposed on opposite sides. The detection circuit includes a switch unit and a detection unit. The switch unit is coupled to the first and second configuration channel pins to sequentially provide a first voltage level of the first configuration channel pin and a second voltage level of the second configuration channel pin. The detection unit is coupled to the switch unit and correspondingly provides a state reference signal according to the first and second voltage levels.
    Type: Application
    Filed: October 19, 2015
    Publication date: January 19, 2017
    Applicant: ITE TECH. INC.
    Inventors: Yi-Chung Chou, Dong-Shan Chen, Chih-Chieh Wu
  • Publication number: 20160146426
    Abstract: A lens includes a lens portion, an outer periphery and a prism portion. The lens portion is disposed at a middle portion of the lens, has an outline that is non-circular, and includes at least one curved surface. The outer periphery surrounds the lens portion. The prism portion is disposed between the lens portion and the outer periphery, and includes at least two undulated sections. Each undulated section has at least one undulated surface.
    Type: Application
    Filed: March 10, 2015
    Publication date: May 26, 2016
    Inventors: Chih-Chieh Wu, Ya-Chieh Ho, Chun-Yi Yeh
  • Publication number: 20160146427
    Abstract: A lens includes a lens portion, an outer periphery and a prism portion. The lens portion is disposed at a middle portion of the lens, has an outline that is non-circular, and includes at least one curved surface. The outer periphery surrounds the lens portion. The prism portion is disposed between the lens portion and the outer periphery, and includes an undulated section that has at least one undulated surface and that has a center disposed at the middle portion of the lens.
    Type: Application
    Filed: March 10, 2015
    Publication date: May 26, 2016
    Inventors: Chih-Chieh WU, Ya-Chieh HO, Chun-Yi YEH
  • Patent number: 9341341
    Abstract: A lens includes a lens portion, an outer periphery and a prism portion. The lens portion is disposed at a middle portion of the lens, has an outline that is non-circular, and includes at least one curved surface. The outer periphery surrounds the lens portion. The prism portion is disposed between the lens portion and the outer periphery, and includes an undulated section that has at least one undulated surface and that has a center disposed at the middle portion of the lens.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: May 17, 2016
    Assignee: Genius Electronic Optical Co., Ltd.
    Inventors: Chih-Chieh Wu, Ya-Chieh Ho, Chun-Yi Yeh