Patents by Inventor Chih-Chung Tsai
Chih-Chung Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240183689Abstract: A control method and a controller related to electromagnetic tracking are provided. In the method, a working position is determined, and the working position is the position at which a magnetic field sensor is located relative to a magnetic field emitter; an electrical characteristic of the magnetic field emitter or the magnetic field sensor is adjusted to a target characteristic corresponding to the working position. In this way, the positioning accuracy may be improved.Type: ApplicationFiled: December 6, 2022Publication date: June 6, 2024Applicant: Metal Industries Research & Development CentreInventors: Zong-Hsin Liu, Po-Chi Hu, I-Chiao Tsai, Chih-Chung Lin
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Patent number: 11990524Abstract: A method includes forming a dummy gate structure across a fin, in which the dummy gate structure has a dummy gate dielectric layer and a dummy gate electrode, forming gate spacers on sidewalls of the dummy gate structure, forming source/drain epitaxial structures on sides of the dummy gate structure, performing a first etch process to the dummy gate electrode such that a recessed dummy gate electrode remains over the fin, performing a second etch process to the gate spacers such that recessed gate spacers remain over the sidewalls of the dummy gate structure, removing the recessed dummy gate electrode and the dummy gate dielectric layer after the second etch process to form a recess between the recessed gate spacers, forming a gate structure overfilling the recess, and performing a third etch process to the gate structure such that a recessed gate structure remains between the recessed gate spacers.Type: GrantFiled: August 30, 2021Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsiao-Chien Lin, Hsi Chung Chen, Cheng-Hung Tsai, Chih-Hsuan Lin
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Publication number: 20240157217Abstract: A golf teaching method and a golf teaching system are provided. The golf teaching method includes: configuring image capturing devices and golf simulator to capture swing images and corresponding simulator data records, when a user performs a golf swing; configuring an expert model that includes expert motion information and corresponding correction suggestion information; configuring a computing device to perform an analysis process on the swing images and the simulator data records to divide the golf swing into user motions according to stages and obtaining records of user motion information corresponding to the plurality of stages, and to compare the user motion information with the corresponding expert motion information in each stage through the expert model, and to provide the corresponding correction suggestion information according to a comparison result; and configuring a user interface to provide the correction suggestion information.Type: ApplicationFiled: April 20, 2023Publication date: May 16, 2024Inventors: CHENG-HUNG TSAI, CHIA-YU JIH, CHIH-CHUNG CHIEN, LI-LIN LU, SHAO-JUN TAN, WEN-FU LAI
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Publication number: 20240162109Abstract: In an embodiment, a package includes an integrated circuit device attached to a substrate; an encapsulant disposed over the substrate and laterally around the integrated circuit device, wherein a top surface of the encapsulant is coplanar with the top surface of the integrated circuit device; and a heat dissipation structure disposed over the integrated circuit device and the encapsulant, wherein the heat dissipation structure includes a spreading layer disposed over the encapsulant and the integrated circuit device, wherein the spreading layer includes a plurality of islands, wherein at least a portion of the islands are arranged as lines extending in a first direction in a plan view; a plurality of pillars disposed over the islands of the spreading layer; and nanostructures disposed over the pillars.Type: ApplicationFiled: January 10, 2023Publication date: May 16, 2024Inventors: Hung-Yi Kuo, Chen-Hua Yu, Kuo-Chung Yee, Yu-Jen Lien, Ke-Han Shen, Wei-Kong Sheng, Chung-Shi Liu, Szu-Wei Lu, Tsung-Fu Tsai, Chung-Ju Lee, Chih-Ming Ke
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Publication number: 20240153943Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: ApplicationFiled: January 5, 2024Publication date: May 9, 2024Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Publication number: 20240134136Abstract: An optical transceiver module temperature control device includes a processor, a printed circuit board assembly, an optical transceiver module and a temperature adjustment element. The processor is configured to measure an ambient temperature. The printed circuit board assembly includes a first side and a second side. The first side is opposite to the second side. The optical transceiver module is disposed on the first side of the printed circuit board assembly. The temperature adjustment element is coupled to the processor and disposed on the second side of the printed circuit board assembly. The processor is configured to generate a temperature adjustment signal according to the ambient temperature and an operating temperature range. The temperature adjustment element is configured to perform heat exchange with the printed circuit board assembly according to the temperature adjustment signal to adjust a temperature of the optical transceiver module into the operating temperature range.Type: ApplicationFiled: October 23, 2023Publication date: April 25, 2024Applicant: Formerica Optoelectronics, Inc.Inventors: Yun-Cheng HUANG, Yi-Nan SHIH, Chih-Chung LIN, Yun-Chin TSAI
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Patent number: 11939212Abstract: A MEMS device is provided. The MEMS device includes a substrate having at least one contact, a first dielectric layer disposed on the substrate, at least one metal layer disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the metal layer and having a recess structure, and a structure layer disposed on the second dielectric layer and having an opening. The opening is disposed on and corresponds to the recess structure, and the cross-sectional area at the bottom of the opening is smaller than the cross-sectional area at the top of the recess structure. The MEMS device also includes a sealing layer, and at least a portion of the sealing layer is disposed in the opening and the recess structure. The second dielectric layer, the structure layer, and the sealing layer define a chamber.Type: GrantFiled: August 25, 2021Date of Patent: March 26, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Heng-Chung Chang, Jhih-Jie Huang, Chih-Ya Tsai, Jing-Yuan Lin
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Patent number: 11916060Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: GrantFiled: June 21, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Patent number: 11715734Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: GrantFiled: June 21, 2022Date of Patent: August 1, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Publication number: 20220336440Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: ApplicationFiled: June 21, 2022Publication date: October 20, 2022Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Publication number: 20220320071Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: ApplicationFiled: June 21, 2022Publication date: October 6, 2022Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Patent number: 11393809Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: GrantFiled: August 27, 2020Date of Patent: July 19, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Publication number: 20210193643Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: ApplicationFiled: August 27, 2020Publication date: June 24, 2021Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Patent number: 9360949Abstract: There is provided a human interface device including a control chip and a plurality of control components. The control chip includes a voltage detection circuit coupled to the plurality of control components via a multiplexing pin and detects a voltage value on the multiplexing pin through the voltage detection circuit thereby identifying an operating state of the plurality of control components.Type: GrantFiled: May 8, 2012Date of Patent: June 7, 2016Assignee: PIXART IMAGING INCInventors: Yu Han Chen, Chia Cheun Liang, Hsiang Sheng Liu, Chih Yen Wu, Chien Jung Huang, Chih Chung Tsai, Ming Tsan Kao
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Patent number: 9182834Abstract: There is provided a mouse device including a control chip and at least one control component. The control chip includes a voltage detection circuit coupled to the at least one control component through at least one multiplexing pin and detects at least one voltage value on the at least one multiplexing pin using the voltage detection circuit thereby identifying an operating state of the at least one control component.Type: GrantFiled: August 16, 2012Date of Patent: November 10, 2015Assignee: PIXART IMAGING INCInventors: Chia Cheun Liang, Hsiang Sheng Liu, Yu Han Chen, Chien Jung Huang, Chih Chung Tsai, Chih Yen Wu, Ming Tsan Kao
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Publication number: 20130057473Abstract: There is provided a mouse device including a control chip and at least one control component. The control chip includes a voltage detection circuit coupled to the at least one control component through at least one multiplexing pin and detects at least one voltage value on the at least one multiplexing pin using the voltage detection circuit thereby identifying an operating state of the at least one control component.Type: ApplicationFiled: August 16, 2012Publication date: March 7, 2013Applicant: PIXART IMAGING INC.Inventors: Chia Cheun LIANG, Hsiang Sheng LIU, Yu Han CHEN, Chien Jung HUANG, Chih Chung TSAI, Chih Yen WU, Ming Tsan KAO
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Publication number: 20130050083Abstract: There is provided a human interface device including a control chip and a plurality of control components. The control chip includes a voltage detection circuit coupled to the plurality of control components via a multiplexing pin and detects a voltage value on the multiplexing pin through the voltage detection circuit thereby identifying an operating state of the plurality of control components.Type: ApplicationFiled: May 8, 2012Publication date: February 28, 2013Applicant: PIXART IMAGING INC.Inventors: Yu Han CHEN, Chia Cheun LIANG, Hsiang Sheng LIU, Chih Yen WU, Chien Jung HUANG, Chih Chung TSAI, Ming Tsan KAO
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Publication number: 20120091812Abstract: A power switching device including a rectifier circuit and a control circuit is provided. A first terminal of the rectifier circuit receives an external voltage source and a second terminal of the rectifier circuit is electrically connected to a node. The control circuit is electrically connected between the node and a battery. Furthermore, during a power supply mode, the control circuit provides a power supply path, so that the battery provides a battery current to the node. Besides, the control circuit detects the battery current and determines whether or not to switch to a normal mode from the power supply mode according to the detection result.Type: ApplicationFiled: January 11, 2011Publication date: April 19, 2012Applicant: UPI SEMICONDUCTOR CORP.Inventors: Yu-Ching Lin, Chih-Chung Tsai
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Publication number: 20080180415Abstract: A driving system of a display panel has a code identification device and several source drivers. The code identification device provides driving-capacity information of the display panel. The source drivers drive the display panel according to the driving-capacity information.Type: ApplicationFiled: January 30, 2007Publication date: July 31, 2008Applicant: HIMAX TECHNOLOGIES LIMITEDInventors: Jiunn-Yau HUANG, Chih-Chung TSAI, Yi-Lin SU
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Patent number: RE49901Abstract: An electrical connector includes an insulative housing defining a front cavity for receiving and a rear cavity, a terminal assembly assembled in the rear cavity, and a ground member. The terminal assembly includes an upper terminal module, a lower terminal module sandwiching a shielding module therebetween. Said The upper terminal module includes a pair of upper ground terminals. Said The lower terminal module includes a plurality of lower ground terminals. Said The shielding module includes a metallic shielding plate. The ground member is associated with the shielding module to mechanically and electrically connect at least one of the upper ground terminals and the lower ground terminals with the shielding plate.Type: GrantFiled: July 29, 2021Date of Patent: April 2, 2024Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITEDInventors: Terrance F. Little, Chih-Hsien Chou, Chun-Hsiung Hsu, Kuei-Chung Tsai