Abstract: Embodiments of this disclosure may include a receiver with a reconfigurable processing path for different signal conditions. Such a receiver may reconfigure between a mixer-first configuration and an amplifier-first configuration. In the mixer-first configuration, an RF input signal is not passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. In the amplifier-first configuration, an RF input signal is passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. Reconfiguring the receiver between mixer-first and amplifier-first configurations may be performed based on detection of jammer signals and/or measurement of signal-to-noise ratio (SNR).

Abstract: Embodiments of this disclosure may include a receiver with a reconfigurable processing path for different signal conditions. Such a receiver may reconfigure between a mixer-first configuration and an amplifier-first configuration. In the mixer-first configuration, an RF input signal is not passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. In the amplifier-first configuration, an RF input signal is passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. Reconfiguring the receiver between mixer-first and amplifier-first configurations may be performed based on detection of jammer signals and/or measurement of signal-to-noise ratio (SNR).

Abstract: An amplifier may include multiple stages, with the multiple stages arranged in a fan-out configuration. The fan-out configuration provides multiple amplified signals at multiple amplifier output nodes, which may be coupled to a shared set of downconverters. The shared downconverters may support processing of only a smaller bandwidth than the largest possible bandwidth of an input RF signal input to the amplifier. For example, the downconverters may support a bandwidth matching a smallest bandwidth of a supported RF signal. For example, when the amplifier is intended to support 5G mmWave RF signals and 5G sub-6 GHz RF signals, the downconverters may each individually support a bandwidth of carriers in the 5G sub-6 GHz RF signals but not individually support the entire bandwidth of a possible 5G mmWave RF signal.

Abstract: Embodiments of this disclosure may include a receiver with a reconfigurable processing path for different signal conditions. Such a receiver may reconfigure between a mixer-first configuration and an amplifier-first configuration. In the mixer-first configuration, an RF input signal is not passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. In the amplifier-first configuration, an RF input signal is passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. Reconfiguring the receiver between mixer-first and amplifier-first configurations may be performed based on detection of jammer signals and/or measurement of signal-to-noise ratio (SNR).

Abstract: Wireless signal processing may be improved by using a configurable baseband filter (BBF) in the receive path of a transceiver. A configurable BBF may accommodate processing of different wireless signals in a single integrated circuit (IC) chip. For example, a single IC may support processing of 5G mmWave RF signals and 5G sub-7 GHz RF signals by reconfiguring the BBF with settings appropriate for the different wireless signals. The reconfiguring of the BBF may include adjusting a bandwidth of the BBF and/or adjusting a filter order of the BBF. The reconfiguring of the BBF may be performed in response to detection of jammer signals to improve rejection of the jammer signals.

Abstract: Gain control in complementary common gate and common source amplifiers is disclosed. In an exemplary embodiment, an apparatus includes a first amplifier stage configured to amplify an input signal at an input terminal to generate a first amplified signal. The first amplifier stage includes a current diverter that selectively diverts current to set a gain of the first amplifier stage. The apparatus also includes a second amplifier stage configured to amplify the input signal at the input terminal to generate a second amplified signal. The second amplifier stage includes a gain control circuit to set a gain of the second amplifier stage.

Abstract: Gain control in complementary common gate and common source amplifiers is disclosed. In an exemplary embodiment, an apparatus includes a first amplifier stage configured to amplify an input signal at an input terminal to generate a first amplified signal. The first amplifier stage includes a current diverter that selectively diverts current to set a gain of the first amplifier stage. The apparatus also includes a second amplifier stage configured to amplify the input signal at the input terminal to generate a second amplified signal. The second amplifier stage includes a gain control circuit to set a gain of the second amplifier stage.

Abstract: A receiver front end circuit includes a low-noise amplifier including: a first receiver path having: a first low-noise transconductor to amplify a received signal and output the amplified received signal; and a first mixer to down-convert the amplified received signal. A second receiver path includes: an auxiliary receiver having: a second transconductor to output an amplified received signal; a baseband amplifier having an input port and an output port; a first resistance coupling the input port to the output port of the baseband amplifier and to convert the amplified received signal from current to voltage and set a voltage gain of the second receiver path; and a second resistance coupled from the output port of the baseband amplifier to the first mixer output. In some examples, frequency-upconversion feedback path includes a third mixer to frequency up-convert the amplified received signal at an output of the second receiver path.

Abstract: A receiver front end circuit includes a low-noise amplifier including: a first receiver path having: a first low-noise transconductor to amplify a received signal and output the amplified received signal; and a first mixer to down-convert the amplified received signal. A second receiver path includes: an auxiliary receiver having: a second transconductor to output an amplified received signal; a baseband amplifier having an input port and an output port; a first resistance coupling the input port to the output port of the baseband amplifier and to convert the amplified received signal from current to voltage and set a voltage gain of the second receiver path; and a second resistance coupled from the output port of the baseband amplifier to the first mixer output. In some examples, frequency-upconversion feedback path includes a third mixer to frequency up-convert the amplified received signal at an output of the second receiver path.

Abstract: A low noise amplifier is used to amplify a differential input pair to generate a differential output pair. The low noise amplifier includes two main paths, two assistant circuits and two adders to make noise carried on two output signals of the differential output pair be the same; therefore, the noise of the two output signals can be fully cancelled in the following operations.

Abstract: A signal processing circuit is used for generating a signal output by processing a signal input, and includes a first mixer unit, a second mixer unit, and a frequency-selective combining block. The first mixer unit is arranged for receiving a first signal and a first oscillation signal, and generating a first mixing output by mixing the first oscillation signal and the first signal. The second mixer unit is arranged for receiving a second signal and a second oscillation signal, and generating a second mixing output by mixing the second oscillation signal and the second signal. Each of the first signal and the second signal is part of the signal input. The first and second oscillation signals have a same frequency but different phases. The frequency-selective combining block is arranged for frequency-selectively combining the first mixing output and the second mixing output to generate the signal output.

Abstract: A low noise amplifier is used to amplify a differential input pair to generate a differential output pair. The low noise amplifier includes two main paths, two assistant circuits and two adders to make noise carried on two output signals of the differential output pair be the same; therefore, the noise of the two output signals can be fully cancelled in the following operations.

Abstract: An integrated circuit is disclosed, including a balun, a transistor pair, and a degeneration inductor winding. The balun has an outer boundary, and comprises a primary winding and a secondary winding. The primary winding is adapted to receive an input signal. The secondary winding is magnetically coupled to the primary winding, and adapted to convert the input signal into a differential form. The transistor pair is connected to the secondary winding and adapted to amplify the input signal. The degeneration inductor winding is connected to the transistor pair and located within the outer boundary of the balun.

Abstract: An amplifier is arranged to receive an input signal and provide an output signal in response, and includes a main amplifier core and an auxiliary circuit. The main amplifier core includes an input node, an output node and a sum node with the input node coupled to the input signal, and is arranged to provide an interior signal to the sum node and output the output signal at the output node in response to signals provided to the sum node. The auxiliary circuit is coupled between the input node and the sum node, and is arranged to match an impedance of the input node and provide a cancelling signal to the sum node in response to the input signal. An associated receiver is also disclosed.

Abstract: A signal processing circuit is used for generating a signal output by processing a signal input, and includes a first mixer unit, a second mixer unit, and a frequency-selective combining block. The first mixer unit is arranged for receiving a first signal and a first oscillation signal, and generating a first mixing output by mixing the first oscillation signal and the first signal. The second mixer unit is arranged for receiving a second signal and a second oscillation signal, and generating a second mixing output by mixing the second oscillation signal and the second signal. Each of the first signal and the second signal is part of the signal input. The first and second oscillation signals have a same frequency but different phases. The frequency-selective combining block is arranged for frequency-selectively combining the first mixing output and the second mixing output to generate the signal output.

Abstract: An amplifier is arranged to receive an input signal and provide an output signal in response, and includes a main amplifier core and an auxiliary circuit. The main amplifier core includes an input node, an output node and a sum node with the input node coupled to the input signal, and is arranged to provide an interior signal to the sum node and output the output signal at the output node in response to signals provided to the sum node. The auxiliary circuit is coupled between the input node and the sum node, and is arranged to match an impedance of the input node and provide a cancelling signal to the sum node in response to the input signal. An associated receiver is also disclosed.

Abstract: An integrated circuit is disclosed, including a balun, a transistor pair, and a degeneration inductor winding. The balun has an outer boundary, and comprises a primary winding and a secondary winding. The primary winding is adapted to receive an input signal. The secondary winding is magnetically coupled to the primary winding, and adapted to convert the input signal into a differential form. The transistor pair is connected to the secondary winding and adapted to amplify the input signal. The degeneration inductor winding is connected to the transistor pair and located within the outer boundary of the balun.