Patents by Inventor Chih-Ho Wang

Chih-Ho Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8980701
    Abstract: A method of forming a semiconductor device includes the following steps. At least a fin structure is provided on a substrate and a gate structure partially overlapping the fin structure is formed. Then, a dielectric layer is formed on the substrate. Subsequently, a first etching process is performed to remove apart of the dielectric layer to form a first spacer surrounding the gate structure and a second spacer surrounding a sidewall of the fin structure, and a protective layer is formed in-situ to cover the gate structure and the first spacer. Finally, a second etching process is performed to remove a part of the protective layer and totally remove the second spacer.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: March 17, 2015
    Assignee: United Microelectronics Corp.
    Inventors: Shui-Yen Lu, Chih-Ho Wang, Jhen-Cyuan Li
  • Patent number: 8709930
    Abstract: A semiconductor process is provided. The prior steps include: a first gate including a first cap layer and a second gate including a second cap layer are formed on a substrate. A hard mask layer is formed to cover the first gate and the second gate. The material of the hard mask layer is different from the material of the first cap layer and the second cap layer. The hard mask layer is removed entirely after a lithography process and an etching process are performed. The following steps include: a material is formed to entirely cover the first gate and the second gate. The material, the first gate and the second gate are etched back to make the first gate and the second gate have the same level and expose layers in both of them.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: April 29, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Zen-Jay Tsai, Shao-Hua Hsu, Chi-Horn Pai, Ying-Hung Chou, Shih-Hao Su, Shih-Chieh Hsu, Chih-Ho Wang, Hung-Yi Wu, Shui-Yen Lu
  • Publication number: 20130137256
    Abstract: A semiconductor process is provided. The prior steps include: a first gate including a first cap layer and a second gate including a second cap layer are formed on a substrate. A hard mask layer is formed to cover the first gate and the second gate. The material of the hard mask layer is different from the material of the first cap layer and the second cap layer. The hard mask layer is removed entirely after a lithography process and an etching process are performed. The following steps include: a material is formed to entirely cover the first gate and the second gate. The material, the first gate and the second gate are etched back to make the first gate and the second gate have the same level and expose layers in both of them.
    Type: Application
    Filed: November 25, 2011
    Publication date: May 30, 2013
    Inventors: Zen-Jay Tsai, Shao-Hua Hsu, Chi-Horn Pai, Ying-Hung Chou, Shih-Hao Su, Shih-Chieh Hsu, Chih-Ho Wang, Hung-Yi Wu, Shui-Yen Lu