Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A high voltage transistor structure including a substrate, a first isolation structure, a second isolation structure, a gate structure, a first source and drain region, and a second source and drain region is provided. The first isolation structure and the second isolation structure are disposed in the substrate. The gate structure is disposed on the substrate, at least a portion of the first isolation structure, and at least a portion of the second isolation structure. The first source and drain region and the second source and drain region are located in the substrate on two sides of the first isolation structure and the second isolation structure. The depth of the first isolation structure is greater than the depth of the second isolation structure.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: The present disclosure provides a battery charging system and method. The battery charging method includes: determining a degree of healthy of a battery module according to an evaluation mechanism; setting a charging standard according to the degree of healthy; by handshaking with a charger, setting a charging voltage for the charger according to the charging standard to charge the battery module; and by the charger, perform a charging operation on the battery module until a fully charged condition is satisfied.

Abstract: An electronic window is provided for adjusting light and includes a first panel, a second panel, and an intermediate layer. The first panel includes a first alignment layer. The second panel includes a second alignment layer. The intermediate layer is disposed between the first panel and the second panel. The angle of orientation of the first alignment layer is between 25 degrees and 65 degrees, and the angle of orientation of the second alignment layer is between 115 degrees and 155 degrees.

Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.

Abstract: Disclosed are an image display method and a 3d display system. The method is adapted to the 3d display system including a 3d display device and includes the following steps. A first image and a second image are obtained by splitting an input image according to a 3d image format. Whether the input image is a 3D format image complying with the 3D image format is determined through a stereo matching processing performed on the first image and the second image. An image interweaving process is enabled to be performed on the input image to generate an interweaving image in response to determining that the input image is the 3D format image complying with the 3D image format, and the interweaving image is displayed via the 3D display device.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a spacer around the gate structure; and forming a buffer layer adjacent to the gate structure. Preferably, the buffer layer includes a crescent moon shape and the buffer layer includes an inner curve, an outer curve, and a planar surface connecting the inner curve and an outer curve along a top surface of the substrate, in which the planar surface directly contacts the outer curve on an outer sidewall of the spacer.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.

Abstract: A system and method for storing data associated with a system management interrupt (SMI) in a computer system. Notification of a system management interrupt is received on a central processing unit. The central processing unit enters a system management mode. A system management handler of a basic input output system (BIOS) is executed by a bootstrap processor of the central processing unit. The system management interrupt is initiated via the bootstrap processor. The system management interrupt data is stored in a register of the bootstrap processor. The SMI data is converted to an accessible format. The converted SMI data is stored in a memory.

Abstract: A sole structure for articles of footwear and a method of manufacturing them comprising at least one polymeric foamed component expanded through supercritical fluid (SCF) expansion of a shaped pre-expanded polymeric material. The polymeric foamed component may include apertures situated and fashioned in the formation of the pre-expanded polymeric material to promote uniform expansion and optimal curing conditions during the SCF expansion process. At least one polymeric foamed component having one set of physical properties that may be bound to or assembled in conjunction with one or more sole components having the same or another set of physical properties.

Abstract: A system and method for storing data associated with a system management interrupt (SMI) in a computer system. Notification of a system management interrupt is received on a central processing unit. The central processing unit enters a system management mode. A system management handler of a basic input output system (BIOS) is executed by a bootstrap processor of the central processing unit. The system management interrupt is initiated via the bootstrap processor. The system management interrupt data is stored in a register of the bootstrap processor. The SMI data is converted to an accessible format. The converted SMI data is stored in a memory.

Abstract: A method and a system for manufacturing a semiconductor package structure are provided. The method includes: (a) providing a package body including at least one semiconductor device encapsulated in an encapsulant; (b) providing a flattening force to the package body; (c) thinning the package body after (b); (d) attaching a film to the package body; and (e) releasing the flattening force after (d).

Abstract: A method and a system for manufacturing a semiconductor package structure are provided. The method includes: (a) providing a package body including at least one semiconductor device encapsulated in an encapsulant; (b) providing a flattening force to the package body; (c) thinning the package body after (b); (d) attaching a film to the package body; and (e) releasing the flattening force after (d).

Abstract: A method and a system for manufacturing a semiconductor package structure are provided. The method includes: (a) providing a package body including at least one semiconductor device encapsulated in an encapsulant; (b) providing a flattening force to the package body; (c) thinning the package body after (b); (d) attaching a film to the package body; and (e) releasing the flattening force after (d).

Abstract: A pressure gauge includes a case with a dial, and a pressure detection unit is located in the case. The chassis plate including a first pivot unit, a second pivot unit, a first Bourdon Tube, a second Bourdon Tube, a first transmission unit, a second transmission unit and an entrance connected thereto. The first Bourdon Tube is connected to the first pivot unit by the first transmission unit, and the second Bourdon Tube is connected to the second pivot unit by the second transmission unit. The entrance communicates with the first and second Bourdon Tubes. The first and second pivot units extend through the dial so as to be connected with a first hand and a second hand respectively. The first and second hands respectively respond different pressure values for more accuracy.

Abstract: A system and method that allows debugging data to be stored without slowing down initialization is disclosed. The system includes a processor, a firmware read only memory (ROM), and a first memory device coupled to the firmware ROM. The firmware ROM can be a BIOS ROM. The first memory device is configured to store debug information from the firmware ROM prior to running an operating system on the processor. Having the firmware ROM store the debug information on the first memory device allows debug information associated with the firmware to be easily accessible without needing a debug firmware or a cable to receive outputs of the debug firmware.

Abstract: The present invention discloses an aperture plate and an aerosol generator. The aperture plate is made by metal materials with a plurality of apertures. The aperture plate has a multi-layer structure, which comprises a substrate, a protective layer and/or at least one intermediate layer between the substrate and the protective layer. The intermediate layer is configured to enhance the adhesion between the substrate and the protective layer, so that it can increase the durability of the aperture plate. The aperture plate can be a dome-shaped, a flat-shaped or an irregular shape. The aperture plate of the present invention can optimize the volume and size of droplets under the vibration at certain frequency.

Abstract: Speech processing system includes a first sound receiving device, a second sound receiving device, a main controller, and an audio processor. First and second sound receiving devices are configured to generate a main voice signal or a secondary voice signal. A first sensing device in first sound receiving device and a second sensing device in second sound receiving device are configured to output a first sensing signal or a second sensing signal based on a sensing result. Main controller controls first sound receiving device to generate main voice signal and controls second sound receiving device to generate secondary voice signal when receiving first sensing signal. Main controller controls second sound receiving device to generate main voice signal and controls first sound receiving device to generate secondary voice signal when receiving second sensing signal. Audio processor is configured to process main and secondary voice signals into an output voice signal.