Patents by Inventor Chih-Hsiang Lin

Chih-Hsiang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966121
    Abstract: An electronic window is provided for adjusting light and includes a first panel, a second panel, and an intermediate layer. The first panel includes a first alignment layer. The second panel includes a second alignment layer. The intermediate layer is disposed between the first panel and the second panel. The angle of orientation of the first alignment layer is between 25 degrees and 65 degrees, and the angle of orientation of the second alignment layer is between 115 degrees and 155 degrees.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: April 23, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: En-Hsiang Chen, Chih-Chin Kuo, Mao-Shiang Lin, Hsu-Kuan Hsu
  • Publication number: 20240128127
    Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-l Fu, Chun-ya Chiu, Chi-Ting Wu, Chin-HUNG Chen, Yu-Hsiang Lin
  • Patent number: 11961951
    Abstract: A light emitting diode device includes a substrate, a conductive via, first and second conductive pads, a driving chip, a flat layer, a redistribution layer, a light emitting diode, and an encapsulating layer. The substrate has a first surface and a second surface opposite thereto. The conductive via penetrates from the first surface to the second surface. The first and second conductive pads are respectively disposed on the first and second surface and in contact with the conductive via. The driving chip is disposed on the first surface. The flat layer is disposed over the first surface and covers the driving chip and the first conductive pad. The redistribution layer is disposed on the flat layer and electrically connects to the driving chip. The light emitting diode is flip-chip bonded to the redistribution layer. The encapsulating layer covers the redistribution layer and the light emitting diode.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: April 16, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Chih-Hao Lin, Jian-Chin Liang, Shih-Lun Lai, Jo-Hsiang Chen
  • Publication number: 20240121373
    Abstract: Disclosed are an image display method and a 3d display system. The method is adapted to the 3d display system including a 3d display device and includes the following steps. A first image and a second image are obtained by splitting an input image according to a 3d image format. Whether the input image is a 3D format image complying with the 3D image format is determined through a stereo matching processing performed on the first image and the second image. An image interweaving process is enabled to be performed on the input image to generate an interweaving image in response to determining that the input image is the 3D format image complying with the 3D image format, and the interweaving image is displayed via the 3D display device.
    Type: Application
    Filed: May 10, 2023
    Publication date: April 11, 2024
    Applicant: Acer Incorporated
    Inventors: Kai-Hsiang Lin, Hung-Chun Chou, Wen-Cheng Hsu, Shih-Hao Lin, Chih-Haw Tan
  • Patent number: 11949056
    Abstract: The light emitting diode packaging structure includes a flexible substrate, a first adhesive layer, micro light emitting elements, a conductive pad, a redistribution layer, and an electrode pad. The first adhesive layer is disposed on the flexible substrate. The micro light emitting elements are disposed on the first adhesive layer and have a first surface facing to the first adhesive layer and an opposing second surface. The micro light emitting elements include a red micro light emitting element, a blue micro light emitting element, and a green micro light emitting element. The conductive pad is disposed on the second surface of the micro light emitting element. The redistribution layer covers the micro light emitting elements and the conductive pad. The electrode pad is disposed on the redistribution layer and is electrically connected to the circuit layer. A thickness of the flexible substrate is less than 100 um.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: April 2, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Chih-Hao Lin, Jo-Hsiang Chen, Shih-Lun Lai, Min-Che Tsai, Jian-Chin Liang
  • Patent number: 11949016
    Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hao Lin, Chih-Chuan Yang, Chih-Hsuan Chen, Bwo-Ning Chen, Cha-Hon Chou, Hsin-Wen Su, Chih-Hsiang Huang
  • Patent number: 11948497
    Abstract: A display device includes a plurality of sub-pixels. The sub-pixels include a first sub-pixel and a second sub-pixel. The first sub-pixel includes a first light emitting element and a first control circuit. The first control circuit is configured to provide a first driving current to the first light emitting element. The second sub-pixel includes a second light emitting element and a second control circuit. The second control circuit is configured to provide a second driving current to the second light emitting element. The first control circuit and the second control circuit are configured to differently control pulse amplitude of the first driving current and pulse amplitude of the second driving current, such that both of the first light emitting element and the second light emitting element emit at a target wavelength or a color point range (e.g. +/?1.5˜2 nm).
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 2, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Chih-Hao Lin, Chien-Nan Yeh, Jo-Hsiang Chen, Shih-Lun Lai
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11866632
    Abstract: Liquid-crystal polymer is composed of the following repeating units: 10 mol % to 35 mol % of 10 mol % to 35 mol % of 10 mol % to 50 mol % of and 10 mol % to 40 mol % of 10 mol % to 40 mol % of or a combination thereof. Each of AR1, AR2, AR3, and AR4 is independently AR5 or AR5-Z-AR6, in which each of AR5 and AR6 is independently or a combination thereof, and Z is —O—, or C1-5 alkylene group. Each of X and Y is independently H, C1-5 alkyl group, CF3, or wherein R2 is H, CH3, CH(CH3)2, C(CH3)3, CF3, or n=1 to 4; and wherein R1 is C1-5 alkylene group.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: January 9, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lin Chu, Jen-Chun Chiu, Zu-Chiang Gu, Po-Hsien Ho, Meng-Hsin Chen, Chih-Hsiang Lin
  • Publication number: 20230045809
    Abstract: A method for automatically cleaning a probe card includes the following operations. A first wafer is tested in a chamber of a testing machine. A yield of the first wafer is monitored by a tool online monitor system (TOMS). An instruction file is transmitted by the TOMS to a tester, in which the instruction file compiles a first program code of the TOMS into a second program code of the tester. The second program code of the tester is received by the tester. A general purpose interface bus (GPIB) command is transferred to a testing machine by the tester. A cleaning operation is performed by the testing machine.
    Type: Application
    Filed: August 11, 2021
    Publication date: February 16, 2023
    Inventors: Che-Wei CHEN, Ting-Wei YU, Chih-Hsiang LIN
  • Patent number: 11572438
    Abstract: A liquid-crystal polymer includes at least one repeating unit having a spiro structure, and the repeating unit occupies 1 mol % to 20 mol % of the liquid-crystal polymer. The liquid-crystal polymer is composed of the following repeating units: 1 mol % to 20 mol % of 10 mol % to 35 mol % of 10 mol % to 35 mol % of 10 mol % to 50 mol % of and 10 mol % to 40 mol % of AR1 is wherein each of ring R and ring S is independently a C3-20 ring, ring R and ring S share a carbon atom, and each of K1 and K2 is independently a C5-20 conjugated system. Each of AR2, AR3, AR4, and AR5 is independently AR6 or AR6—Z—AR7.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: February 7, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lin Chu, Jen-Chun Chiu, Zu-Chiang Gu, Po-Hsien Ho, Meng-Hsin Chen, Chih-Hsiang Lin
  • Patent number: 11475863
    Abstract: A display driving device and an anti-interference method thereof are provided. A timing controller outputs a data signal. A source driver detects an interference event according to the data signal, and outputs a feedback signal to the timing controller in response to the detection result of the interference event. The timing controller adjusts the signal strength of the data signal according to the feedback signal.
    Type: Grant
    Filed: June 7, 2020
    Date of Patent: October 18, 2022
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Peng-Chi Chen, Mong-Hua Tu, Chih-Hsiang Lin
  • Publication number: 20210383770
    Abstract: A display driving device and an anti-interference method thereof are provided. A timing controller outputs a data signal. A source driver detects an interference event according to the data signal, and outputs a feedback signal to the timing controller in response to the detection result of the interference event. The timing controller adjusts the signal strength of the data signal according to the feedback signal.
    Type: Application
    Filed: June 7, 2020
    Publication date: December 9, 2021
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Peng-Chi Chen, Mong-Hua Tu, Chih-Hsiang Lin
  • Patent number: 11087708
    Abstract: The present invention provides a method for transmitting data from a timing controller to a source driver, wherein the method includes the steps of: applying a plurality of data rates to a discrete data rate setting; and transmitting image data of a plurality of frames by using a plurality of modulated data rates, respectively; wherein the plurality of modulated data rates are generated by performing spread-spectrum clocking (SSC) upon the plurality of data rates, respectively; and for each of the frames, its corresponding image data is transmitting by using only one of the modulated data rates.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 10, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Mong-Hua Tu, Peng-Chi Chen, Chih-Hsiang Lin, Yin-Ho Chiang, Jen-Chieh Liu, Shih-Po Chen, Cheng-Yu Shih, Chien-Lung Cho, Yi-Ping Tu
  • Patent number: 10965530
    Abstract: In a multi-stage network discovery system, a target device is identified by a logical address and associated with a configuration item (CI) record stored in a configuration management database (CMDB). A receiver module receives first probe data from a first probe running against the target device, the first probe data comprising constant attribute data of the target device, stores at least part of the first probe data in a first part of the CI record, receives subsequent probe data from at least one subsequent probe against the target device using the logical address, the subsequent probe data comprising the constant attribute data of the target device, determines that the constant attribute data from the subsequent probe matches the constant attribute data from the CI record, and in response to the determination, stores the subsequent data obtained from the second probe in a second part of the CI record.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: March 30, 2021
    Assignee: ServiceNow, Inc.
    Inventor: Sky Chih Hsiang Lin
  • Patent number: 10913812
    Abstract: An alkoxy amine compound is provided, which has a chemical structure of: wherein each of R1 is independently H, C1-6 alkyl group, or C1-6 alkoxy group; R2 is C1-6 alkyl group, R3 is —(CxH2x)—OH or —(CxH2x+1), and x is 1 to 8; R4 is H or C1-6 alkyl group; R5 is and R6 is H or C1-8 alkyl group; R7 is H or C1-6 alkyl group, R8 is Ini is a residual group of a radical initiator; and n is an integer of 1 to 10000.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: February 9, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Meng-Wei Wang, Yu-Min Han, Chih-Hsiang Lin
  • Patent number: 10907011
    Abstract: An elastomer is provided, which is a product of reacting C4-12 lactam, poly(C2-4 alkylene glycol), C4-12 diacid, and multi-ester aliphatic monomer. The C4-12 lactam and the poly(C2-4 alkylene glycol) have a weight ratio of 20:80 to 80:20. The total weight of the C4-12 lactam and the poly(C2-4 alkylene glycol) and the weight of the C4-12 diacid have a ratio of 100:0.5 to 100:10. The total weight of the C4-12 lactam and the poly(C2-4 alkylene glycol) and the weight of the multi-ester aliphatic monomer have a ratio of 100:0.01 to 100:5.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: February 2, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sheng-Lung Chang, Jen-Chun Chiu, Yung-Chan Lin, Chih-Hsiang Lin, Chien-Ming Chen