Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. Top packages are mounted on a top side of a reconstructed wafer over a flexible tape, where conductive bumps at a bottom side of the reconstructed wafer is attached to the flexible tape, and during the mounting, a shape geometry of the respective conductive bump changes and at least a lower portion of the respective conductive bump is embraced by the flexible tape. The flexible tape is released from the conductive bumps after the mounting.

Abstract: In an embodiment, a package includes an integrated circuit device attached to a substrate; an encapsulant disposed over the substrate and laterally around the integrated circuit device, wherein a top surface of the encapsulant is coplanar with the top surface of the integrated circuit device; and a heat dissipation structure disposed over the integrated circuit device and the encapsulant, wherein the heat dissipation structure includes a spreading layer disposed over the encapsulant and the integrated circuit device, wherein the spreading layer includes a plurality of islands, wherein at least a portion of the islands are arranged as lines extending in a first direction in a plan view; a plurality of pillars disposed over the islands of the spreading layer; and nanostructures disposed over the pillars.

Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.

Abstract: A method includes forming a first waveguide over a substrate; forming a first layer of low-dimensional material on the first waveguide; forming a first layer of dielectric material over the first layer of low-dimensional material; forming a second layer of low dimensional material on the first layer of dielectric material; and forming a first conductive contact that electrically contacts the first layer of low-dimensional material and a second conductive contact that electrically contacts the second layer of low-dimensional material.

Abstract: A power dividing and combining device comprising a resonance body, a plurality of circuit boards, an upper cover and a lower cover is provided. The resonance body comprises a solid conductive body, a plurality of first dividing elements, a plurality of second dividing elements, a signal-receiving end and a signal-transmitting end. The solid conductive body has a first surface, a second surface opposite to the first surface, and a plurality of side surfaces connecting the first surface and the second surface. The first dividing elements are disposed on the first surface and separate a plurality of first resonance channels on the first surface. The first resonance channels intersect at a first common region on the first surface. The second dividing elements are disposed on the second surface and separate a plurality of second resonance channels on the second surface. The second resonance channels intersect at a second common region on the second surface.

Abstract: Package structures and methods of forming package structures are described. A method includes placing a first package within a recess of a first substrate. The first package includes a first die. The method further includes attaching a first sensor to the first package and the first substrate. The first sensor is electrically coupled to the first package and the first substrate.

Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.

Abstract: Disclosed is a memory cell including a first transistor having a first terminal coupled to a bit line; a second transistor having a first terminal coupled to a bit line bar; a weight storage circuit coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, storing a weight value, and determining to turn on the first transistor or the second transistor according to the weight value; and a driving circuit coupled to a second terminal of the first transistor, a second terminal of the second transistor, and at least one word line, receiving at least one threshold voltage and at least one input data from the word line, and determining whether to generate an operation current on a path of the turned-on first transistor or the turned-on second transistor according to the threshold voltage and the input data.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: An antenna apparatus includes a feeding antenna inside an electronic device and one or more antenna elements, such as a floating metal antenna, disposed on a rear cover of the electronic device. The floating metal antenna and a feeding antenna inside the electronic device may form a coupling antenna structure. The feeding antenna may be an antenna fastened on an antenna support (which may be referred to as a support antenna). The feeding antenna may alternatively be a slot antenna formed by slitting on a metal middle frame of the electronic device. The antenna apparatus may be implemented in limited design space, thereby effectively saving antenna design space inside the electronic device. The antenna apparatus may generate excitation of a plurality of resonance modes, so that antenna bandwidth and radiation characteristics can be improved.

Abstract: A method of estimating shift of white balance point. According to characteristics of a photograph sensing apparatus, a white-point plane of a YIQ color coordinate is determined. The white-point plane has a normal direction pointing one of the axis of the YIQ color coordinate. The white-point plane is thus perpendicular to such axis with a one-dimensional one-spot value. Consequently, a YIQ image data described by the YIQ color coordinate is obtained. The same rotation operation is performed to rotate the YIQ image data to obtain a one-dimensional image value. The one-dimensional image value is compared to the one-dimensional white-point value to obtain a differential value, so as to estimate the white-point shift. In the above method, the axis of the YIQ color coordinate includes the Y-axis after rotation.

Abstract: A method of estimating shift of white balance point. According to characteristics of a photograph sensing apparatus, a white-point plane of a YIQ color coordinate is determined. The white-point plane has a normal direction pointing one of the axis of the YIQ color coordinate. The white-point plane is thus perpendicular to such axis with a one-dimensional one-spot value. Consequently, a YIQ image data described by the YIQ color coordinate is obtained. The same rotation operation is performed to rotate the YIQ image data to obtain a one-dimensional image value. The one-dimensional image value is compared to the one-dimensional white-point value to obtain a differential value, so as to estimate the white-point shift. In the above method, the axis of the YIQ color coordinate includes the Y-axis after rotation.

Abstract: An image sensing device includes a pixel sensing data processing unit, for receiving a pixel line sensing data to output first and second outputs. A controller receives the first output from the pixel sensing data processing unit, checks whether the pixel line sensing data include at least one defective pixel. If it has defective pixel, a correction rule is applied to compare the status data with a previously defective pixel. The correction rule includes comparing a state data of the previous defect pixels. If the defective pixel belongs to a regular pattern, the defective pixel is not corrected. A correction unit receives the second output and receives the correction status from the controller, and to correct the pixel and exports a display data. A recording unit records the status data of the defective pixel detected by the controller for comparing the status data of the next pixel line sensing data.

Abstract: A preview system for a digital camera is provided. The preview system comprises an image capture apparatus, an image signal processor and a display device. The image capture apparatus detects from an actual photographic object to generate a first image signal. The image signal processor corrects the first image signal to generate a second image signal. The corrected second image signal is transmitted to the display device to provide a preview image. This invention discloses a simple image processor circuit. In addition, a less expensive and power-consuming multiple gray scale super-twisted nematic liquid crystal display (STN-LCD) instead of a color thin-film transistor liquid crystal display (TFT-LCD). Thus, the digital camera can operate for an extended period of time and an optical viewfinder can be omitted to reduce the size and the cost of the digital camera.

Abstract: A method of estimating shift of white balance point. According to characteristics of a photograph sensing apparatus, a white-point plane of a YIQ color coordinate,is determined. The white-point plane has a normal direction pointing one of the axis of the YIQ color coordinate. The white-point plane is thus perpendicular to such axis with a one-dimensional one-spot value. Consequently, a YIQ image data described by the YIQ color coordinate is obtained. The same rotation operation is performed to rotate the YIQ image data to obtain a one-dimensional image value. The one-dimensional image value is compared to the one-dimensional white-point value to obtain a differential value, so as to estimate the white-point shift. In the above method, the axis of the YIQ color coordinate includes the Y-axis after rotation.

Abstract: A method of fast converging an appropriate exposure value. By establishing a EV lookup table of exposure valuescamera characteristics that can be easily modified, the image extracted by an optical sensor of a digital camera is fast converged into an appropriate exposure value quickly in a close-loop computation. Therefore, the multi-variable (exposure time, gain value and f-number number) exposure control can be easily achieved to fast converge the appropriate automatic exposure value.