Patents by Inventor Chih-Hui Cheng
Chih-Hui Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240194646Abstract: A semiconductor package includes a substrate, first bumps, a first chip, metal pillars, second bumps and a second chip. The substrate includes first and second conductive pads which are located on a top surface of the substrate. Both ends of the first bumps are connected to the first conductive pads and the first chip, respectively. Both ends of the metal pillars are connected to the second conductive pads and one end of the second bumps, respectively. A cross-sectional area of each of the metal pillars is larger than that of each of the second bumps. The second chip is connected to the other end of the second bumps and located above the first chip.Type: ApplicationFiled: September 29, 2023Publication date: June 13, 2024Inventors: Chin-Tang Hsieh, Lung-Hua Ho, Chih-Ming Kuo, Chen-Yu Wang, Chih-Hao Chiang, Pai-Sheng Cheng, Kung-An Lin, Chun-Ting Kuo, Yu-Hui Hu, Wen-Cheng Hsu
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Patent number: 11996345Abstract: A package structure includes a first semiconductor die, a first insulating encapsulation, a thermal coupling structure, and a heat dissipating component thermally coupled to the first semiconductor die through the thermal coupling structure. The first semiconductor die includes an active side, a rear side, and a sidewall connected to the active side and the rear side. The first insulating encapsulation extends along the sidewall of the first semiconductor die and includes a first side substantially leveled with the active side, a second side opposite to the first side, and topographic features at the second side. The thermal coupling structure includes a metallic layer overlying and the rear side of the first semiconductor die and the topographic features of the first insulating encapsulation. A manufacturing method of a package structure is also provided.Type: GrantFiled: August 27, 2021Date of Patent: May 28, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
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Patent number: 11954020Abstract: A memory adaptive temperature controlling method, a storage device, and a control circuit unit are provided. In this exemplary embodiment, the temperature value is obtained according to the temperature measured by the thermal sensor, and the access speed to be reached is calculated according to the temperature change rate within the specific time range and the adjustment percentage when it is determined that the speed-down or speed-up operation is required to be performed. By adjusting the access speed of the memory storage device in a stepwise manner, the temperature of the memory storage device may be stabilized, thereby striking the balance between the temperature stability and the system performance of the memory storage device.Type: GrantFiled: May 9, 2022Date of Patent: April 9, 2024Assignee: Hefei Core Storage Electronics LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Xu Hui Cheng
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Patent number: 11942403Abstract: In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.Type: GrantFiled: November 4, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chien Pan, Li-Hui Cheng, Chin-Fu Kao, Szu-Wei Lu
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Publication number: 20240096732Abstract: Some implementations described herein provide techniques and apparatuses for a fixture including a semiconductor die package and methods of formation. The semiconductor die package is mounted to an interposer. In addition to the semiconductor die package, the fixture includes a lid component having a top structure and footing structures that connect the lid component to the interposer. The fixture includes a thermal interface material between a top surface of the semiconductor die package and the top structure of the lid component. The footing structures, connected to the interposer using deposits of an epoxy material, provide increase a structural rigidity of the fixture relative to another fixture not including the footing structures.Type: ApplicationFiled: January 13, 2023Publication date: March 21, 2024Inventors: Chih-Hao CHEN, Li-Hui CHENG, Ying-Ching SHIH
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Publication number: 20240079399Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
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Publication number: 20240071847Abstract: A semiconductor package including two different adhesives and a method of forming are provided. The semiconductor package may include a package component having a semiconductor die bonded to a substrate, a first adhesive over the substrate, a heat transfer layer on the package component, and a lid attached to the substrate by a second adhesive. The first adhesive may encircle the package component and the heat transfer layer. The lid may include a top portion on the heat transfer layer and the first adhesive, and a bottom portion attached to the substrate and encircling the first adhesive. A material of the second adhesive may be different from a material of the first adhesive.Type: ApplicationFiled: August 26, 2022Publication date: February 29, 2024Inventors: Yi-Huan Liao, Ping-Yin Hsieh, Chih-Hao Chen, Pu Wang, Li-Hui Cheng, Ying-Ching Shih
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Publication number: 20240071857Abstract: A semiconductor device includes a package substrate, a package component and at least one adhesive pattern. The package component has a thermal interface material (TIM) layer thereon. The adhesive pattern has a first surface facing the package substrate and a second surface opposite to the first surface, and the second surface of the at least one adhesive pattern is substantially coplanar with a surface of the TIM layer.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chien Pan, Pu Wang, Li-Hui Cheng, Ying-Ching Shih
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Patent number: 10631660Abstract: A support pad comprises a first surface layer, a second surface layer and an airbag structure. The first surface layer is disposed on the first surface of the support pad. The second surface layer is disposed on the second surface of the support pad and connected to the first surface layer. An edge of the first surface layer is connected to an edge of the second surface layer to cover the airbag structure. The airbag structure has a plurality of hollowed portions and a first connecting portion of the first surface layer is connected to a second connecting portion of the second surface layer through a space provided by the hollowed portions.Type: GrantFiled: February 12, 2018Date of Patent: April 28, 2020Inventor: Chih-Hui Cheng
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Publication number: 20190246804Abstract: A support pad comprises a first surface layer, a second surface layer and an airbag structure. The first surface layer is disposed on the first surface of the support pad. The second surface layer is disposed on the second surface of the support pad and connected to the first surface layer. An edge of the first surface layer is connected to an edge of the second surface layer to cover the airbag structure. The airbag structure has a plurality of hollowed portions and a first connecting portion of the first surface layer is connected to a second connecting portion of the second surface layer through a space provided by the hollowed portions.Type: ApplicationFiled: February 12, 2018Publication date: August 15, 2019Inventor: CHIH-HUI CHENG
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Publication number: 20190015275Abstract: A hospital bed comprises gas mattress units, connecting pipe devices and a gas supplying-releasing device. The gas mattress units each have an inner layer and an outer layer. The inner layer is an airbag. The outer layer is a laminated fabric. The laminated fabric encloses the airbag. The airbag internally defines a first gas receiving space. A second gas receiving space is defined between the laminated fabric and the airbag. The connecting pipe devices and the gas supplying-releasing device are in communication with the gas mattress units, allowing a gas to be introduced into and released from the first gas receiving space. The first and second gas receiving spaces enable the hospital bed to bear high internal pressure and thus be durable, thereby lessening the durability requirement of the laminated fabric.Type: ApplicationFiled: July 12, 2017Publication date: January 17, 2019Inventor: CHIH-HUI CHENG
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Publication number: 20120210061Abstract: In a method for testing a redundant array of independent disks (RAID) of a computer, the RAID includes two or more hard disk drives. A RAID volume is created for the RAID. One of the hard disk drives in the RAID is disabled while the RAID volume is in an optimal state. The RAID volume is in a degraded state when one of the hard disk drives in the RAID is disabled. The disabled hard disk drive in the RAID is then enabled while the RAID volume is in the degraded state. Then an attempt to rebuild the RAID volume is made. The RAID works normally once each of the hard disk drives in the RAID is disabled and enabled, and the RAID volume is successfully rebuilt after each enablement and the optimal state is achieved.Type: ApplicationFiled: December 9, 2011Publication date: August 16, 2012Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: CHIH-HUI CHENG
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Publication number: 20080196755Abstract: A tent with improved structure is disclosed. The present invention includes a tent body with several covering portions, several sleeve pipes disposed among the covering portions, an opening disposed in one of the covering portions and a supporting structure with a connecting portion comprises a main encapsulation and several complementary encapsulations. The encapsulations are worn through the sleeve pipes, and every complementary encapsulation comprises an opening end and a closing end. The opening ends of the complementary encapsulations are connected respectively to the connecting portion of the main encapsulation, wherein6 an air hole is disposed in one of the encapsulations. A sleeve bag is combined from a plurality of sleeve tubes and it is utilized to slide onto the supporting structure, the connecting portion of the main encapsulation and the complementary encapsulations in order to increase the reliability and toughness of the connecting portions of the tent structure.Type: ApplicationFiled: February 21, 2007Publication date: August 21, 2008Inventor: Chih-Hui Cheng
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Patent number: D899150Type: GrantFiled: August 27, 2018Date of Patent: October 20, 2020Inventor: Chih-Hui Cheng
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Patent number: D1017061Type: GrantFiled: January 27, 2022Date of Patent: March 5, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Chih-Hsien Wang, Shih-Chieh Chang, Yan-Jun Wang, Peng-Hui Wang, Ming-Chieh Cheng
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Patent number: D1017062Type: GrantFiled: January 27, 2022Date of Patent: March 5, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Chih-Hsien Wang, Shih-Chieh Chang, Chuan-Hsi Chang, Peng-Hui Wang, Ming-Chieh Cheng
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Patent number: D1018891Type: GrantFiled: December 13, 2021Date of Patent: March 19, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Chih-Hsien Wang, Shih-Chieh Chang, Peng-Hui Wang, Ming-Chieh Cheng, Xiu-Yi Lin