Patents by Inventor Chih-Hung Shih

Chih-Hung Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955507
    Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 9, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsin-Hung Li, Wei-Syun Wang, Chih-Chiang Chen, Yu-Cheng Shih, Cheng-Chan Wang, Chia-Hsin Chung, Ming-Jui Wang, Sheng-Ming Huang
  • Patent number: 11801422
    Abstract: A wearable positioning device includes an inertial sensor, a storage device and a processor. The inertial sensor senses an acceleration signal and an angular velocity signal. The storage device stores a previous positioning signal and a current coordinate. The processor is electrically connected to the inertial sensor and the storage device. A wearable positioning method is executed by the processor, which includes: determining whether the wearable positioning device is in one of an under-water mode and an above-water mode according to a pressure sensing signal; calculating, when in the under-water mode, a current acceleration and a current direction according to the acceleration signal, the angular velocity signal, and a swimming posture signal representing a swimming posture; and calculating a current positioning signal according to the current acceleration, the current direction and the previous positioning signal, and updating the current coordinate with the current positioning signal.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: October 31, 2023
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Chun Chen, Chih-Hung Shih, Yu Hung Chiang
  • Publication number: 20230200022
    Abstract: A two-phase immersion type heat dissipation substrate is in contact with a heat generating element, and includes an immersion type heat dissipation base and at least one first and at least one second fin assembly that are formed on an upper surface thereof. The at least one first fin assembly is located directly above at least one high-temperature heat source area of the heat generating element, and the at least one second fin assembly is located directly above an area that is not the at least one high-temperature heat source area of the heat generating element. The at least one first and at least one second fin assembly include multiple first fins and multiple second fins, respectively. An arrangement density of the first fins is greater than that of the second fins, and a fin height of the first fins is greater than that of the second fins.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 22, 2023
    Inventors: CHENG-SHU PENG, CHIH-HUNG SHIH
  • Publication number: 20230098773
    Abstract: An immersion-type porous heat dissipation substrate structure is provided. The immersion-type porous heat dissipation substrate structure includes a porous heat dissipation base formed by sintering of metal powder. The porous heat dissipation base is immersed in a two-phase coolant for increasing an amount of bubbles that is generated, and has a porosity that is controlled to be between 5% and 50%. Or, the porous heat dissipation base has more than one porosity.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: CHENG-SHU PENG, TZE-YANG YEH, CHIH-HUNG SHIH
  • Publication number: 20230069470
    Abstract: A wearable positioning device includes an inertial sensor, a storage device and a processor. The inertial sensor senses an acceleration signal and an angular velocity signal. The storage device stores a previous positioning signal and a current coordinate. The processor is electrically connected to the inertial sensor and the storage device. A wearable positioning method is executed by the processor, which includes: determining whether the wearable positioning device is in one of an under-water mode and an above-water mode according to a pressure sensing signal; calculating, when in the under-water mode, a current acceleration and a current direction according to the acceleration signal, the angular velocity signal, and a swimming posture signal representing a swimming posture; and calculating a current positioning signal according to the current acceleration, the current direction and the previous positioning signal, and updating the current coordinate with the current positioning signal.
    Type: Application
    Filed: October 14, 2021
    Publication date: March 2, 2023
    Inventors: Chun Chen, CHIH-HUNG SHIH, Yu Hung Chiang
  • Publication number: 20220246493
    Abstract: A water-cooling device with a composite heat-dissipating structure is provided, which includes a casing, a main heat-dissipating structure and a layered heat-dissipating structure. The casing is used for accommodating a working fluid, and the casing includes a heat-dissipating substrate. The main heat-dissipating structure includes a plurality of heat-dissipating fins arranged vertically and in parallel to each other that are connected to the heat-dissipating substrate. The layered heat-dissipating structure includes a plurality of horizontal heat-dissipating bodies arranged horizontally and in parallel to each other that are connected to the plurality of heat-dissipating fins arranged vertically and in parallel to each other, and a distance between the plurality of horizontal heat-dissipating bodies arranged horizontally and in parallel to each other is greater than or equal to a distance between the plurality of heat-dissipating fins arranged vertically and in parallel to each other.
    Type: Application
    Filed: February 3, 2021
    Publication date: August 4, 2022
    Inventors: CHENG-SHU PENG, TZE-YANG YEH, CHIH-HUNG SHIH
  • Publication number: 20220234071
    Abstract: A substrate structure having a cold sprayed layer and a method for manufacturing the same are provided. The substrate structure having the cold sprayed layer includes a base layer and the cold sprayed layer. The cold sprayed layer is formed on a predetermined area of the base layer by spraying and dissolving. An included angle is formed between at least one side surface of the cold sprayed layer and the base layer.
    Type: Application
    Filed: January 26, 2021
    Publication date: July 28, 2022
    Inventors: HUNG-AN CHAO, CHIH-HUNG SHIH
  • Publication number: 20220193828
    Abstract: A lift-off structure for a sprayed thin layer on a substrate surface and a method for the same are provided. The lift-off structure for the sprayed thin layer on the substrate surface includes a base layer and a lifted-off sprayed thin layer. The lifted-off sprayed thin layer is formed on the base layer. The lifted-off sprayed thin layer has at least one ablated new side surface formed thereon, and the at least one ablated new side surface has an inclination angle.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Cheng-Shu Peng, Tze-Yang Yeh, Chih-Hung Shih
  • Patent number: 11302601
    Abstract: An IGBT module with a heat dissipation structure and a method for manufacturing the same are provided. The IGBT module with a heat dissipation structure includes a layer of IGBT chips, a bonding layer, a thick copper layer, a thermally-conductive and electrically-insulating layer, and a heat dissipation layer. A portion of the thermally-conductive and electrically-insulating layer is made of a polymer composite material, and a remaining portion of the thermally-conductive and electrically-insulating layer is made of a ceramic material. The thick copper layer is bonded onto the thermally-conductive and electrically-insulating layer by hot pressing. A fillet is formed at a bottom edge of the thick copper layer, and the bottom edge of the thick copper layer is embedded into the thermally-conductive and electrically-insulating layer.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: April 12, 2022
    Assignee: AMULAIRE THERMAL TECHNOLOGY, INC.
    Inventors: Tzu-Hsuan Wang, Tze-Yang Yeh, Chih-Hung Shih
  • Patent number: 9250447
    Abstract: Disclosed herein is a parallax barrier including a first substrate, a second substrate and a liquid crystal layer disposed between the first and the second substrates. A plurality of first strip electrodes and a plurality of second strip electrodes are arranged on the first substrate, whereas a plurality of third electrodes and a plurality of fourth electrodes are arranged on the second substrate. Each of the third electrodes has a step-shaped first portion and each of the fourth electrodes has a step-shaped second portion.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: February 2, 2016
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Meng-Chieh Tsai, Chih-Wen Chen, Chih-Hung Shih
  • Patent number: 9251739
    Abstract: A first display zone and a second display zone are displayed based on a first light source group, which corresponds to a first voltage data signal; and then the second display zone and a third display zone are displayed based on light for a second light source group, which corresponding to a second voltage data signal. The first light source group and the second light source group illuminate the display zones alternatively. Each display zone is fed with either a first data voltage signal or a second data voltage signal. While the first data voltage signal is updating each display zone in sequence, the second data voltage signal starts updating the first display zone when the first voltage signal is updating the third display zone.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: February 2, 2016
    Assignee: AU OPTRONICS CORP.
    Inventors: Meng-Chieh Tsai, Chih-Wen Chen, Chih-Hung Shih, Chih-Jen Hu, Ren-Wei Liao
  • Patent number: 9064470
    Abstract: A liquid crystal display panel includes a substrate, gate lines, data lines, pixel electrodes, an insulating layer, patterned common electrodes and connection lines. Each pixel electrode includes a transparent electrode. The insulating layer covers the pixel electrodes. The patterned common electrodes are disposed on the insulating layer. Each patterned common electrodes includes a plurality of electrode branches, and at least one slit disposed between two adjacent electrode branches. The patterned common electrode includes a transparent electrode. The connection line is disposed on the insulating layer, and each connection line is in contact with and electrically connects to the patterned common electrodes of two adjacent sub-pixel regions.
    Type: Grant
    Filed: December 25, 2012
    Date of Patent: June 23, 2015
    Assignee: AU Optronics Corp.
    Inventors: Kuo-Sheng Tsao, Ching-Sheng Cheng, Chih-Hung Shih
  • Patent number: 8937649
    Abstract: A method of displaying a three-dimensional image is disclosed. The method includes the steps of receiving a left-eye gray level image array and a right-eye gray level image array; converting the left-eye gray level image array and the right-eye gray level image array into a left-eye luminance image array and a right-eye luminance image array respectively; receiving a left-eye compensation array; adjusting the right-eye luminance image array in accordance with the left-eye luminance array and the left-eye compensation array; converting the adjusted right-eye luminance image array into an adjusted right-eye gray level image array; displaying the adjusted right-eye gray level image array.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: January 20, 2015
    Assignee: AU Optronics Corp.
    Inventors: Meng-Chieh Tsai, Chih-Wen Chen, Chih-Hung Shih
  • Publication number: 20150015622
    Abstract: A first display zone and a second display zone are displayed based on a first light source group, which corresponds to a first voltage data signal; and then the second display zone and a third display zone are displayed based on light for a second light source group, which corresponding to a second voltage data signal. The first light source group and the second light source group illuminate the display zones alternatively. Each display zone is fed with either a first data voltage signal or a second data voltage signal. While the first data voltage signal is updating each display zone in sequence, the second data voltage signal starts updating the first display zone when the first voltage signal is updating the third display zone.
    Type: Application
    Filed: October 2, 2014
    Publication date: January 15, 2015
    Inventors: MENG-CHIEH TSAI, CHIH-WEN CHEN, CHIH-HUNG SHIH, CHIH-JEN HU, REN-WEI LIAO
  • Patent number: 8885028
    Abstract: A stereoscopic display is proposed. A first display zone and a second display zone are displayed based on light for a first light source group, in response to a first data voltage signal fed to the first display zone and the second display zone, and to a second data voltage signal fed to a third display zone. The second display zone and the third display zone are displayed based on light for a second light source group, in response to the second data voltage signal fed to the first display zone, and to the first data voltage signal fed to the second display zone and the third display zone. The first display zone and the second display zone are displayed based on light from the first light source group, in response to the second data voltage signal fed to the first display zone and the second display zone, and to the first data voltage signal fed to the third display zone.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: November 11, 2014
    Assignee: AU Optronics Corp.
    Inventors: Meng-chieh Tsai, Chih-wen Chen, Chih-hung Shih, Chih-jen Hu, Ren-wei Liao
  • Publication number: 20140327849
    Abstract: Disclosed herein is a parallax barrier including a first substrate, a second substrate and a liquid crystal layer disposed between the first and the second substrates. A plurality of first strip electrodes and a plurality of second strip electrodes are arranged on the first substrate, whereas a plurality of third electrodes and a plurality of fourth electrodes are arranged on the second substrate. Each of the third electrodes has a step-shaped first portion and each of the fourth electrodes has a step-shaped second portion.
    Type: Application
    Filed: July 16, 2014
    Publication date: November 6, 2014
    Inventors: Meng-Chieh Tsai, Chih-Wen Chen, Chih-Hung SHIH
  • Patent number: 8823888
    Abstract: Disclosed herein is a parallax barrier including a first substrate, a second substrate and a liquid crystal layer disposed between the first and the second substrates. A plurality of first strip electrodes and a plurality of second strip electrodes are arranged on the first substrate, whereas a plurality of third electrodes and a plurality of fourth electrodes are arranged on the second substrate. Each of the third electrodes has a step-shaped first portion and each of the fourth electrodes has a step-shaped second portion.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: September 2, 2014
    Assignee: Au Optronics Corporation
    Inventors: Meng-Chieh Tsai, Chih-Wen Chen, Chih-Hung Shih
  • Patent number: 8674361
    Abstract: A pixel structure includes a substrate, a gate line and a gate electrode disposed on the substrate, an insulating layer covering the substrate, a semiconductor layer disposed on the insulating layer, a data line, a source electrode, and a drain electrode which are disposed on the insulating layer and the semiconductor layer, a planarization layer disposed on the data line, the source electrode, and the drain electrode, and a pixel electrode disposed on the planarization layer. The planarization layer has a through hole exposing the drain electrode. The pixel electrode is electrically connected to the drain electrode via the through hole and includes an opaque main electrode and a plurality of transparent branch electrodes disposed on the planarization layer. One end of each transparent branch electrode is electrically connected to the opaque main electrode.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: March 18, 2014
    Assignee: AU Optronics Corp.
    Inventors: En-Hung Liu, Ching-Sheng Cheng, Chih-Hung Shih
  • Publication number: 20140015739
    Abstract: A liquid crystal display panel includes a substrate, gate lines, data lines, pixel electrodes, an insulating layer, patterned common electrodes and connection lines. Each pixel electrode includes a transparent electrode. The insulating layer covers the pixel electrodes. The patterned common electrodes are disposed on the insulating layer. Each patterned common electrodes includes a plurality of electrode branches, and at least one slit disposed between two adjacent electrode branches. The patterned common electrode includes a transparent electrode. The connection line is disposed on the insulating layer, and each connection line is in contact with and electrically connects to the patterned common electrodes of two adjacent sub-pixel regions.
    Type: Application
    Filed: December 25, 2012
    Publication date: January 16, 2014
    Applicant: AU OPTRONICS CORP.
    Inventors: Kuo-Sheng Tsao, Ching-Sheng Cheng, Chih-Hung Shih
  • Patent number: 8593608
    Abstract: A three-dimensional display includes a display panel having a plurality of first pixels arranged in the odd row, and a plurality of second pixels arranged in the even row. Each first pixel has a first and a second transparent regions and a first semiconductor pattern. Each second pixel has a third and a fourth transparent regions and a second semiconductor pattern. In any two adjacent first and second pixels, the first and the third transparent regions are mirror images of each other, and the second and the fourth transparent regions are mirror images of each other. In the adjacent first and second pixels arranged in any two rows, the loss of the light transmittance at any position along the row direction due to overlapping of the first semiconductor and the first transparent region and overlapping of the second semiconductor and the fourth transparent region remains unchanged.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: November 26, 2013
    Assignee: Au Optronics Corporation
    Inventors: Ren-Wei Liao, Meng-Chieh Tsai, Chih-Wen Chen, Chih-Hung Shih