Abstract: A heat dissipation system adapted to dissipate heat for an electronic device includes a tank, a first heat exchanger, and a fluid delivery device. The tank includes a first zone and a second zone. A cooling fluid is located in the first and second zones. The electronic device is adapted to be disposed in the first zone and immersed in the cooling fluid. The first heat exchanger is located at a junction of the first and second zones to reduce a temperature of the cooling fluid. The cooling fluid flows from the first zone to the second zone through the fluid delivery device. The cooling fluid is adapted to flow to the first zone from the second zone after passing through the first heat exchanger, so as to dissipate heat for the electronic device, and then flows to the second zone through the fluid delivery device, such that a cycle is formed.

Abstract: An electronic device for updating on-board data of power off status is provided, which combines a rewritable memory, an embedded controller, and a second network socket onto a motherboard. The rewritable memory includes a target storage area. The embedded controller includes a second network interface electrically connected to the second network socket, for receiving a writing command and a binary file. After receiving power of a standby mode, the embedded controller executes a data writing program to receive the writing command and the binary file via the second network socket and the second network interface, and writes the binary data file into the target storage area of the rewritable memory by using the data writing program.

Abstract: An electronic device for updating on-board data of power off status is provided, which combines a rewritable memory, an embedded controller, and a second network socket onto a motherboard. The rewritable memory includes a target storage area. The embedded controller includes a second network interface electrically connected to the second network socket, for receiving a writing command and a binary file. After receiving power of a standby mode, the embedded controller executes a data writing program to receive the writing command and the binary file via the second network socket and the second network interface, and writes the binary data file into the target storage area of the rewritable memory by using the data writing program.

Abstract: A power connector includes housing, partition plate, first and second pins, first and second wires and filler. The housing has an interior space, first and second slots. The partition plate divides the interior space into first and second wire channels. Each first and second pin has an inserting portion and a wire connecting portion. The wire connecting portions of the first and second pins are respectively located in the first and second wire channels. The first and the second wires are respectively located in the first and second wire channels. The first and second wires are electrically connected to the wire connecting portions of the first and the second pins respectively. A material of the filler is different from the housing. The filler is filled in the interior space to enclose and separate the first wires and the second wires.

Abstract: A server device includes a chassis and at least one server assembly. The chassis has at least one accommodating space, at least one first surface, at least one second surface, at least one opening and at least one front side. The first surface and the second surface face each other, and respectively located at two opposite sides of the accommodating space. The opening is located at the front side and connected to the accommodating space. The server assembly is slidably disposed in the accommodating space from the opening. The server assembly includes a first server and a second server. The first server is closer to the first surface than the second server. The first surface and the front side are orthogonal to a reference plane. An orthogonal projection of the first server on the reference plane partially overlaps an orthogonal projection of the second server on the reference plane.

Abstract: A fan holder includes at least one frame, a first lateral plate, and a second lateral plate. The frame has a first side surface and a second side surface opposite to each other, and the first side surface and the second side surface respectively have a positioning member and a slot. Each frame can be selectively combined with each other through the first side surface and the second side surface. The first lateral plate has a positioning trough, and the second lateral plate has a stopper. The first lateral plate and the second lateral plate are detachably disposed on the first side surface and the second side surface respectively. The positioning member is interlocked with the positioning trough, and the stopper is inserted in the slot. The fan is disposed in the fan holder, and the fan holder is fixed to a case of an electronic device, so as to provide an air flow to cool the electronic device.

Abstract: A fan holder includes at least one frame, a first lateral plate, and a second lateral plate. The frame has a first side surface and a second side surface opposite to each other, and the first side surface and the second side surface respectively have a positioning member and a slot. Each frame can be selectively combined with each other through the first side surface and the second side surface. The first lateral plate has a positioning trough, and the second lateral plate has a stopper. The first lateral plate and the second lateral plate are detachably disposed on the first side surface and the second side surface respectively. The positioning member is interlocked with the positioning trough, and the stopper is inserted in the slot. The fan is disposed in the fan holder, and the fan holder is fixed to a case of an electronic device, so as to provide an air flow to cool the electronic device.

Abstract: Methods and systems for updating a source image file in a BIOS memory are provided. In one embodiment of the method, an initialization document is loaded to generate a first image file, and the initialization document comprises a function setting and first and second address information associated with the function setting, and the function setting represents whether a system locked pre-installation (SLP) 2.0 is supported. The initialization document is loaded to write an SLP mark and an OEM public key to the first image file according to the first and second address information, serving as a second image file. The second image file is written into the source image file in the BIOS memory.

Abstract: A computer system comprising a memory module, a connection port, and a central processing unit (CPU) is disclosed. The memory module stores a main base input/output system (BIOS) comprising an auxiliary function. The connection port is capable of connecting an auxiliary module comprising at least one specific program. The CPU executes the main BIOS when the auxiliary function is de-activated. The CPU executes the specific program when the auxiliary function is activated.

Abstract: Methods and systems for updating a source image file in a BIOS memory are provided. In one embodiment of the method, an initialization document is loaded to generate a first image file, and the initialization document comprises a function setting and first and second address information associated with the function setting, and the function setting represents whether a system locked pre-installation (SLP) 2.0 is supported. The initialization document is loaded to write an SLP mark and an OEM public key to the first image file according to the first and second address information, serving as a second image file. The second image file is written into the source image file in the BIOS memory.

Abstract: A computer system comprising a memory module, a connection port, and a central processing unit (CPU) is disclosed. The memory module stores a main base input/output system (BIOS) comprising an auxiliary function. The connection port is capable of connecting an auxiliary module comprising at least one specific program. The CPU executes the main BIOS when the auxiliary function is de-activated. The CPU executes the specific program when the auxiliary function is activated.