Patents by Inventor Chih-Kui Yang

Chih-Kui Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8642898
    Abstract: A circuit board structure with capacitors embedded therein and a method for fabricating the same are disclosed. The structure comprises at least two core layers individually comprising a dielectric layer having two opposite surfaces, circuit layers disposed on the outsides of the two opposite surfaces of the dielectric layer, and at least two capacitors embedded respectively on the insides of the two opposite surfaces of the dielectric layer and individually electrically connecting with the circuit layer at the same side; at least one adhesive layer disposed between the core layers to combine the core layers as a core structure; and at least one conductive through hole penetrating the core layers and the adhesive layer, and electrically connecting the circuit layers of the core layers. Accordingly, the present invention can improve the flexibility of circuit layout, and realize parallel connection between the capacitors to provide more capacitance.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: February 4, 2014
    Assignee: Unimicron Technology Corp.
    Inventors: Chung-Cheng Lien, Chih-Kui Yang
  • Publication number: 20120292089
    Abstract: A circuit board structure with capacitors embedded therein and a method for fabricating the same are disclosed. The structure comprises at least two core layers individually comprising a dielectric layer having two opposite surfaces, circuit layers disposed on the outsides of the two opposite surfaces of the dielectric layer, and at least two capacitors embedded respectively on the insides of the two opposite surfaces of the dielectric layer and individually electrically connecting with the circuit layer at the same side; at least one adhesive layer disposed between the core layers to combine the core layers as a core structure; and at least one conductive through hole penetrating the core layers and the adhesive layer, and electrically connecting the circuit layers of the core layers. Accordingly, the present invention can improve the flexibility of circuit layout, and realize parallel connection between the capacitors to provide more capacitance.
    Type: Application
    Filed: August 2, 2012
    Publication date: November 22, 2012
    Applicant: Unimicron Technology Corp.
    Inventors: Chung-Cheng LIEN, Chih-Kui Yang
  • Patent number: 8256106
    Abstract: A circuit board structure with capacitors embedded therein and a method for fabricating the same are disclosed. The structure comprises at least two core layers individually comprising a dielectric layer having two opposite surfaces, circuit layers disposed on the outsides of the two opposite surfaces of the dielectric layer, and at least two capacitors embedded respectively on the insides of the two opposite surfaces of the dielectric layer and individually electrically connecting with the circuit layer at the same side; at least one adhesive layer disposed between the core layers to combine the core layers as a core structure; and at least one conductive through hole penetrating the core layers and the adhesive layer, and electrically connecting the circuit layers of the core layers. Accordingly, the present invention can improve the flexibility of circuit layout, and realize parallel connection between the capacitors to provide more capacitance.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: September 4, 2012
    Assignee: Unimicron Technology Corp.
    Inventors: Chung-Cheng Lien, Chih-Kui Yang
  • Patent number: 7908744
    Abstract: A method of fabricating a printed circuit board having capacitance components, including: providing a core board having first and second surfaces with first and second wiring layers provided thereon, respectively, and electrically connected, a second dielectric layer, and a carrier board sequentially provided thereon with a second metal layer, a high dielectric material layer, and a third wiring layer with a plurality of first electrode plates thereon; laminating the core board, second dielectric layer, and carrier board to one another; removing the carrier board so as to expose the second metal layer; and patterning the second metal layer so as to form a fifth wiring layer having a plurality of second electrode plates and a plurality of second conductive vias electrically connected to the third wiring layer, thereby allowing the first electrode plates, high dielectric material layer, and second electrode plates together to form a plurality of capacitance components.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: March 22, 2011
    Assignee: Unimicron Technology Corp.
    Inventors: Shin-Ping Hsu, Chih-Kui Yang
  • Publication number: 20100115767
    Abstract: A method of fabricating a printed circuit board having capacitance components, including: providing a core board having first and second surfaces with first and second wiring layers provided thereon, respectively, and electrically connected, a second dielectric layer, and a carrier board sequentially provided thereon with a second metal layer, a high dielectric material layer, and a third wiring layer with a plurality of first electrode plates thereon; laminating the core board, second dielectric layer, and carrier board to one another; removing the carrier board so as to expose the second metal layer; and patterning the second metal layer so as to form a fifth wiring layer having a plurality of second electrode plates and a plurality of second conductive vias electrically connected to the third wiring layer, thereby allowing the first electrode plates, high dielectric material layer, and second electrode plates together to form a plurality of capacitance components.
    Type: Application
    Filed: August 14, 2009
    Publication date: May 13, 2010
    Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATION
    Inventors: Shin-Ping Hsu, Chih-Kui Yang
  • Publication number: 20090102045
    Abstract: A packaging substrate having capacitors embedded therein, comprising: two capacitor disposition layers, each respectively consisting of a high dielectric layer and two first circuit layers disposed on two opposite surfaces of the high dielectric layer, wherein each of the first circuit layers has a plurality of electrode plates and a plurality of circuits; an adhesive layer disposed between the capacitor disposition layers to adhere the capacitor disposition layers to form a core board structure, wherein spaces between the circuits of every first circuit layer are filled with the adhesive layer; and a plurality of conductive through holes penetrating the capacitor disposition layers and the adhesive layer, and electrically connecting the circuits of the capacitor disposition layers respectively; wherein, pairs of the electrode plates on the opposite surfaces of each of the capacitor disposition layers are parallel and correspond to each other to form capacitors.
    Type: Application
    Filed: October 17, 2008
    Publication date: April 23, 2009
    Applicant: Phoenix Precision Technology Corporation
    Inventors: Shih-Ping Hsu, Wen-Sung Chang, Chih-Kui Yang
  • Publication number: 20090077799
    Abstract: The present invention relates to a circuit board structure with a capacitor embedded therein and the method for fabricating the same. The disclosed structure comprises: a core board; a buffer layer disposed on two surfaces of the core board and having a plurality of open areas; a first circuit layer disposed in the open areas; a high dielectric material film disposed over the first circuit layer and the buffer layer on at least one surface of the core board; and a second circuit layer disposed on the high dielectric material film, wherein the region where the second circuit layer corresponds to the first circuit layer functions as a capacitor, and the first circuit layer on two surfaces of the core board electrically connects to each other by at least one plated through hole. The present invention improves the problem of void generation and enhances the precision of the capacitor region.
    Type: Application
    Filed: September 12, 2008
    Publication date: March 26, 2009
    Applicant: Phoenix Precision Technology Corporation
    Inventor: Chih Kui Yang
  • Publication number: 20080308309
    Abstract: A structure of a packaging substrate having capacitors embedded therein is disclosed. The structure comprises a core substrate, a dielectric layer, and an outer circuit layer. The core substrate comprises an inner circuit layer. The dielectric layer is disposed at both sides of the core substrate, having first conductive vias each connecting to the inner circuit layer through a piece of outer electrode plate, a piece of high dielectric material layer, a piece of inner electrode plate, and a piece of adhesive layer, in sequence. The outer circuit layer is disposed on the surface of each of the dielectric layers. Herein, the capacitor is composed of a piece of the outer electrode plate, the high dielectric material layer and the inner electrode plate. The invention further comprises a method for manufacturing the same. This can achieve low costs, avoid the formation of voids, and reduce parasitic capacitance.
    Type: Application
    Filed: June 14, 2007
    Publication date: December 18, 2008
    Applicant: Phoenix Precision Technology Corporation
    Inventors: Chung-Cheng Lien, Chih-Kui Yang
  • Publication number: 20080217739
    Abstract: The present invention relates to a semiconductor packaging substrate structure with a capacitor embedded therein, which includes an inner circuit board, a patterned buffer layer, a high dielectric material layer, and a patterned metal layer. The buffer layer is disposed on at least one surface of the inner circuit board to expose the inner electrode layer of the internal board. The high dielectric material layer is located on the buffer layer and the inner electrode layer. The metal layer is placed on the high dielectric material layer including an outer circuit layer capable of electrical connection to the inner circuit layer, and an outer electrode layer corresponding to the inner electrode layer to form a capacitor. Owing to the assistance of the buffer layer, the structure can enhance the transmission and the quality of the products.
    Type: Application
    Filed: May 19, 2008
    Publication date: September 11, 2008
    Applicant: Phoenix Precision Technology Corporation
    Inventors: Chung-Cheng Lien, Chih-Kui Yang
  • Publication number: 20080210460
    Abstract: A circuit board structure with capacitors embedded therein and a method for fabricating the same are disclosed. The structure comprises at least two core layers individually comprising a dielectric layer having two opposite surfaces, circuit layers disposed on the outsides of the two opposite surfaces of the dielectric layer, and at least two capacitors embedded respectively on the insides of the two opposite surfaces of the dielectric layer and individually electrically connecting with the circuit layer at the same side; at least one adhesive layer disposed between the core layers to combine the core layers as a core structure; and at least one conductive through hole penetrating the core layers and the adhesive layer, and electrically connecting the circuit layers of the core layers. Accordingly, the present invention can improve the flexibility of circuit layout, and realize parallel connection between the capacitors to provide more capacitance.
    Type: Application
    Filed: January 24, 2008
    Publication date: September 4, 2008
    Applicant: Phoenix Precision Technology Corporation
    Inventors: Chung-Cheng Lien, Chih-Kui Yang
  • Publication number: 20080030965
    Abstract: A circuit board structure with capacitor embedded therein and method for fabricating the same are disclosed, especially a core structure with capacitors embedded therein and method for fabricating the same. The structure comprising: a core board having a dielectric layer with a first surface and an opposite second surface; at least one high dielectric coefficient material layer formed in the dielectric layer, wherein a first electrode plate formed on the other surface of the high dielectric coefficient material layer; a first circuit layer formed on the first surface of the dielectric layer; a second circuit layer formed on the second surface of the dielectric layer and having a second electrode plate corresponding to the first electrode plate; and a first conductive via formed in the dielectric layer and electrically connecting the first electrode plate and the first circuit layer.
    Type: Application
    Filed: February 2, 2007
    Publication date: February 7, 2008
    Applicant: Phoenix Precision Technology Corporation
    Inventors: Chung-Cheng Lien, Chih-Kui Yang