Patents by Inventor Chih-Kuo Tseng

Chih-Kuo Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960051
    Abstract: Various embodiments may provide a method of fabricating a meta-lens structure. The method may include forming a first dielectric layer in contact with a silicon wafer. The method may also include forming a second dielectric layer in contact with the first dielectric layer. A refractive index of the second dielectric layer may be different from a refractive index of the first dielectric layer. The method may further include, in patterning the second dielectric layer. The method may additionally include removing at least a portion of the silicon wafer to expose the first dielectric layer.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: April 16, 2024
    Assignee: Agency for Science, Technology and Research
    Inventors: Shiyang Zhu, Chih-Kuo Tseng, Ting Hu, Zhengji Xu, Yuan Dong, Alex Yuandong Gu
  • Publication number: 20240113056
    Abstract: A semiconductor package including a first interposer comprising a first substrate, first optical components over the first substrate, a first dielectric layer over the first optical components, and first conductive connectors embedded in the first dielectric layer, a photonic package bonded to a first side of the first interposer, where a first bond between the first interposer and the photonic package includes a dielectric-to-dielectric bond between a second dielectric layer on the photonic package and the first dielectric layer, and a second bond between the first interposer and the photonic package includes a metal-to-metal bond between a second conductive connector on the photonic package and a first one of the first conductive connectors and a first die bonded to the first side of the first interposer.
    Type: Application
    Filed: March 3, 2023
    Publication date: April 4, 2024
    Inventors: Hsing-Kuo Hsia, Chen-Hua Yu, Chih-Wei Tseng, Jui Lin Chao
  • Publication number: 20240103236
    Abstract: A method includes forming an optical engine, which includes a photonic die. The photonic die further includes a grating coupler. The method further includes forming a fiber unit including a fiber platform having a groove, and an optical fiber attached to the fiber platform. The optical fiber extends into the groove. The fiber platform further includes a reflector. The fiber unit is attached to the optical engine, and the reflector is configured to deflect a light beam, so that the light beam emitted by a first one of the optical fiber and the grating coupler is received by a second one of the optical fiber and the grating coupler.
    Type: Application
    Filed: January 3, 2023
    Publication date: March 28, 2024
    Inventors: Chih-Wei Tseng, Jui Lin Chao, Hsing-Kuo Hsia, Chen-Hua Yu
  • Publication number: 20240085621
    Abstract: A method includes encapsulating a first device die and a second device die in an encapsulant, and forming an interconnect structure over and electrically connecting to the first device die and the second device die. A waveguide is formed in the interconnect structure. An optical-engine based interconnect component is bonded to the interconnect structure. The optical-engine based interconnect component forms a part of a signal path that connects the first device die to the second device die.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 14, 2024
    Inventors: Hsing-Kuo Hsia, Chen-Hua Yu, Chih-Wei Tseng, Jui Lin Chao
  • Publication number: 20240077670
    Abstract: A semiconductor structure includes an optical interposer having at least one first photonic device in a first dielectric layer and at least one second photonic device in a second dielectric layer, wherein the second dielectric layer is disposed above the first dielectric layer. The semiconductor structure further includes a first die disposed on the optical interposer and electrically connected to the optical interposer; a first substrate under the optical interposer; and conductive connectors under the first substrate.
    Type: Application
    Filed: January 13, 2023
    Publication date: March 7, 2024
    Inventors: Chih-Wei Tseng, Hsing-Kuo Hsia, Stefan Rusu, Chen-Hua Yu, Chewn-Pu Jou
  • Patent number: 11923466
    Abstract: A photodetector with an integrated reflective grating structure includes a substrate, an active layer disposed on the substrate, and a grating structure disposed between the substrate and the active layer. A first doped region is formed on the substrate at a location near the grating structure. A second doped region is formed on a surface of the active layer away from the grating structure. The doping type of the second doped region is different from that of the first doped region.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: March 5, 2024
    Assignee: INNOLIGHT TECHNOLOGY (SUZHOU) LTD.
    Inventors: Chih-Kuo Tseng, Guoliang Chen, Xiaoyao Li, Yuzhou Sun, Yue Xiao
  • Patent number: 11335820
    Abstract: A waveguide photoelectric detector, comprising: a substrate comprising a silicon layer, the silicon layer having a silicon waveguide formed thereon; an active layer dispose on the silicon waveguide, the active layer having a first doped region formed thereon; a horizontal PIN junction formed at an area of the silicon layer below the active layer, the horizontal PIN junction comprising a second doped region, an intrinsic region, and a third doped region. A doping type of the second doped region is the same as that of the first doped region. One end of the second doped region near the intrinsic region is connected to the first doped region. The third doped region and the first doped region form a vertical PIN junction.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 17, 2022
    Assignee: InnoLight Technology (Suzhou) Ltd.
    Inventors: Chih-Kuo Tseng, Xianyao Li, Yuzhou Sun
  • Publication number: 20210396910
    Abstract: Various embodiments may provide a method of fabricating a meta-lens structure. The method may include forming a first dielectric layer in contact with a silicon wafer. The method may also include forming a second dielectric layer in contact with the first dielectric layer. A refractive index of the second dielectric layer may be different from a refractive index of the first dielectric layer. The method may further include, in patterning the second dielectric layer. The method may additionally include removing at least a portion of the silicon wafer to expose the first dielectric layer.
    Type: Application
    Filed: October 14, 2019
    Publication date: December 23, 2021
    Inventors: Shiyang Zhu, Chih-Kuo Tseng, Ting Hu, Zhengji Xu, Yuan Dong, Alex Yuandong Gu
  • Publication number: 20210111289
    Abstract: A waveguide photoelectric detector, comprising: a substrate comprising a silicon layer, the silicon layer having a silicon waveguide formed thereon; an active layer dispose on the silicon waveguide, the active layer having a first doped region formed thereon; a horizontal PIN junction formed at an area of the silicon layer below the active layer, the horizontal PIN junction comprising a second doped region, an intrinsic region, and a third doped region. A doping type of the second doped region is the same as that of the first doped region. One end of the second doped region near the intrinsic region is connected to the first doped region. The third doped region and the first doped region form a vertical PIN junction.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 15, 2021
    Inventors: Chih-Kuo TSENG, Xianyao LI, Yuzhou SUN
  • Publication number: 20200287064
    Abstract: A photodetector with an integrated reflective grating structure includes a substrate, an active layer disposed on the substrate, and a grating structure disposed between the substrate and the active layer. A first doped region is formed on the substrate at a location near the grating structure. A second doped region is formed on a surface of the active layer away from the grating structure. The doping type of the second doped region is different from that of the first doped region.
    Type: Application
    Filed: March 3, 2020
    Publication date: September 10, 2020
    Inventors: Chih-Kuo TSENG, Guoliang CHEN, Xiaoyao LI, Yuzhou SUN, Yue XIAO
  • Patent number: 9366817
    Abstract: A method is provided to integrate all active and passive integrated optical devices on a silicon (Si)-based integrated circuit (IC). A Si-based substrate, instead of a Si-on-insulator (SOI) substrate, is used for integrating the devices. Therefore, cost is down and heat dissipation efficiency is enhanced. Besides, rapid melt growth (RMG) is used for solving problems on integrating the electric circuit and the optical devices. The present invention can be used to develop a proactive optical transceivers on a standard chip; or, to fully and compatibly integrate all devices on a circuit for an optical communication chip.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: June 14, 2016
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Ming-Chang Lee, Chih-Kuo Tseng
  • Patent number: 9196483
    Abstract: The present disclosure provides a carrier channel with an element concentration gradient distribution. The carrier channel includes a substrate and a carrier channel structure. The carrier channel structure is stacked on the substrate, wherein a ratio of a height and a width of the carrier channel is greater than 1, and the carrier channel is crystallized from the contact surface by a rapid melting growth process, thus the carrier channel structure has the element concentration gradient distribution.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: November 24, 2015
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Ming-Chang Lee, Chih-Kuo Tseng
  • Publication number: 20150332921
    Abstract: The present disclosure provides a carrier channel with an element concentration gradient distribution. The carrier channel includes a substrate and a carrier channel structure. The carrier channel structure is stacked on the substrate, wherein a ratio of a height and a width of the carrier channel is greater than 1, and the carrier channel is crystallized from the contact surface by a rapid melting growth process, thus the carrier channel structure has the element concentration gradient distribution.
    Type: Application
    Filed: September 11, 2014
    Publication date: November 19, 2015
    Inventors: Ming-Chang LEE, Chih-Kuo TSENG
  • Publication number: 20150331187
    Abstract: A method is provided to integrate all active and passive integrated optical devices on a silicon (Si)-based integrated circuit (IC). A Si-based substrate, instead of a Si-on-insulator (SOI) substrate, is used for integrating the devices. Therefore, cost is down and heat dissipation efficiency is enhanced. Besides, rapid melt growth (RMG) is used for solving problems on integrating the electric circuit and the optical devices. The present invention can be used to develop a proactive optical transceivers on a standard chip; or, to fully and compatibly integrate all devices on a circuit for an optical communication chip.
    Type: Application
    Filed: June 19, 2014
    Publication date: November 19, 2015
    Inventors: Ming-Chang Lee, Chih-Kuo Tseng
  • Patent number: 8846503
    Abstract: The present invention relates to a self-aligned and lateral-assembly method for integrating heterogeneous material structures on the same plane. By using this method, two semiconductor materials heterogeneous to each other can be laterally assembled in a self-alignment way, without using any epitaxial buffer layers or gradient buffer layers. Therefore, when applying this method to fabricating an electronic device having heterojunction, not only the manufacture cost can be effectively reduced, but the difficulty of manufacturing process can also be overcome.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: September 30, 2014
    Assignee: National Tsing Hua University
    Inventors: Ming-Chang Lee, Chih-Kuo Tseng
  • Patent number: 8536028
    Abstract: The present invention relates to a self alignment and assembly fabrication method for stacking multiple material layers, wherein a variety of homogeneous/heterogeneous materials can be stacked on a substrate by this self alignment and assembly fabrication method, without using any epitaxial buffer layers or gradient buffer layers; Moreover, these stacked materials can be single crystal, polycrystalline or non-crystalline phase materials. So that, by applying this self alignment and assembly fabrication method to fabricate a multi-layer device, not only the material cost can be effectively reduced, but the wafer alignment problem existing in the conventional wafer bonding process can also be solved. In addition, in the present invention, rapid melting growth (RMG) is used for growing the multiple crystallized materials laterally and rapidly from the substrate surface by liquid phase epitaxy, therefore the thermal budget can be largely reduced when fabricating the multi-layer device.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: September 17, 2013
    Assignee: National Tsing Hua University
    Inventors: Ming-Chang Lee, Chih-Kuo Tseng, Zhong-Da Tian
  • Patent number: 7659664
    Abstract: A system for displaying an image includes a plurality of pixels each having a first organic light-emitting device (OLED), a second OLED and a third OLED. The pixel includes a first electrode layer, a first organic light-emitting layer, a second organic light-emitting layer, a second electrode layer and a color filter. The first organic light-emitting layer is disposed on the first electrode layer and within the first OLED and the second OLED. The second organic light-emitting layer is disposed on the first electrode layer and within the second OLED and the third OLED so that the first and second organic light-emitting layers overlap within the second OLED. The second electrode layer is disposed on the first organic light-emitting layer and the second organic light-emitting layer. The color filter is disposed within the second OLED.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: February 9, 2010
    Assignee: TPO Displays Corp.
    Inventors: Ryuji Nshikawa, Chih-Kuo Tseng, Hsiang-Lun Hsu
  • Publication number: 20070278940
    Abstract: A system for displaying an image includes a plurality of pixels each having a first organic light-emitting device (OLED), a second OLED and a third OLED. The pixel includes a first electrode layer, a first organic light-emitting layer, a second organic light-emitting layer, a second electrode layer and a color filter. The first organic light-emitting layer is disposed on the first electrode layer and within the first OLED and the second OLED. The second organic light-emitting layer is disposed on the first electrode layer and within the second OLED and the third OLED so that the first and second organic light-emitting layers overlap within the second OLED. The second electrode layer is disposed on the first organic light-emitting layer and the second organic light-emitting layer. The color filter is disposed within the second OLED.
    Type: Application
    Filed: May 29, 2007
    Publication date: December 6, 2007
    Inventors: Ryuji Nshikawa, Chih-Kuo Tseng, Hsiang-Lun Hsu