Patents by Inventor Chih-Li Chang
Chih-Li Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240151900Abstract: A method for manufacturing a semiconductor device includes: forming a first waveguide structure and a second waveguide structure on a substrate in which the first waveguide structure and the second waveguide structure is spaced apart from each other by a recess; conformally forming an un-doped dielectric layer to cover the first and second waveguide structures and to form a gap between two corresponding portions of the un-doped dielectric layer laterally covering the first waveguide structure and the second waveguide structure, respectively; and forming a doped filling layer to fill the gap.Type: ApplicationFiled: February 22, 2023Publication date: May 9, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wei-Li LO, Huan-Chieh CHEN, Yao-Wen CHANG, Chih-Ming CHEN
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Publication number: 20240145398Abstract: A carrier structure is provided, in which at least one positioning area is defined on a chip-placement area of a package substrate, and at least one alignment portion is disposed on the positioning area. Therefore, the precision of manufacturing the alignment portion is improved by disposing the positioning area on the chip-placement area, such that the carrier structure can provide a better alignment mechanism for the chip placement operation.Type: ApplicationFiled: December 8, 2022Publication date: May 2, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Cheng-Liang HSU, Wan-Rou CHEN, Hsin-Yin CHANG, Tsung-Li LIN, Hsiu-Jung LI, Chiu-Lien LI, Fu-Quan XU, Yi-Wen LIU, Chih-Chieh SUN
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Publication number: 20240113205Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.Type: ApplicationFiled: November 28, 2023Publication date: April 4, 2024Inventors: Chih-Chiang Chang, Ming-Hua Yu, Li-Li Su
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Patent number: 11942652Abstract: The disclosure provides a limit device and a robot using the same. The limit device comprises a first connecting member, a transmission rod and a second connecting member. The first connecting member comprising a first main body portion and two first connecting elements. The two first connecting elements are arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod comprising a first end and a second end. The first end and the second end are arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member provided with two indexing buckles. The two indexing buckles are arranged at intervals, each of the indexing buckles comprises a first limiting groove and a second limiting groove.Type: GrantFiled: April 13, 2022Date of Patent: March 26, 2024Assignees: Futaijing Precision Electronics (Yantai) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Chen-Ting Kao, Chi-Cheng Wen, Yu-Sheng Chang, Chih-Cheng Lee, Chiung-Hsiang Wu, Sheng-Li Yen, Yu-Cheng Zhang, Chang-Ju Hsieh, Chen Chao
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Publication number: 20240087057Abstract: A power consumption monitoring device includes a sensor, a storage, and a processor. The sensor is configured to detect a power-consuming device quantity and a power consumption amount. The storage is configured to store the power-consuming device quantity and the power consumption amount. The processor is communicatively connected to the sensor and the storage. The processor is configured to calculate a power-consuming device idling indicator based on the power-consuming device quantity and the power consumption amount in a monitoring time interval, wherein the power-consuming device idling indicator is used for indicating a deviation status of the power-consuming device quantity and the power consumption amount. The processor is further configured to determine whether the power-consuming device idling indicator exceeds a warning threshold. In response to the power-consuming device idling indicator exceeding the warning threshold, the processor is further configured to generate a warning message.Type: ApplicationFiled: December 20, 2022Publication date: March 14, 2024Inventors: Wei-Chao CHEN, Ming-Chi CHANG, Chih-Pin WEI, Ke-Li WU, Hua-Hsiu CHIANG, Yu-Lun CHANG
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Publication number: 20240088307Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
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Publication number: 20240088267Abstract: A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Yi PENG, Chih Chieh YEH, Chih-Sheng CHANG, Hung-Li CHIANG, Hung-Ming CHEN, Yee-Chia YEO
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Patent number: 11921101Abstract: Disclosed are calibration techniques that can be implemented by a device that conducts biological tests. In certain embodiments, the device for testing a biological specimen includes a receiving mechanism to receive a carrier, a camera module arranged to capture imagery of the carrier, and a processor. Some examples of the processor can detect a calibration mode trigger. In calibration mode, the processor can divide the captured imagery into segments and selectively perform one or more calibration procedures for each segment. Then, the processor records a calibration result for each segment.Type: GrantFiled: January 25, 2022Date of Patent: March 5, 2024Assignee: Bonraybio Co., Ltd.Inventors: Cheng-Teng Hsu, Chih-Pin Chang, Kuang-Li Huang, Yu-Chiao Chi, Chia-Wei Chang, Chiung-Han Wang
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Patent number: 11916018Abstract: A connection structure of a semiconductor device is provided in the present invention. The connection structure includes an interlayer dielectric, a top metal structure, and a passivation layer. The interlayer dielectric is disposed on a substrate. The top metal structure is disposed on the interlayer dielectric. The top metal structure includes a bottom portion and a top portion disposed on the bottom portion. The bottom portion includes a first sidewall, and the top portion includes a second sidewall. A slope of the first sidewall is larger than a slope of the second sidewall. The passivation layer is conformally disposed on the second sidewall, the first sidewall, and a top surface of the interlayer dielectric.Type: GrantFiled: March 4, 2021Date of Patent: February 27, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chen-Yi Weng, Shih-Che Huang, Ching-Li Yang, Chih-Sheng Chang
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Patent number: 11737348Abstract: A halide material having general formula ArMAX is disclosed. The halide material can be processed to an optoelectronic film with a halogenated formamidine and a lead halide, and the optoelectronic film can be applied in the manufacture of an optoelectronic device like a perovskite laser or a PeLED. Experimental data have proved that, the fabricated optoelectronic film shows a property of photoluminescence (PL) peak wavelength adjustable. Moreover, the PL peak wavelength moves from 482 nm to 534 nm with the increase of the content of lead (Pb), halogen (X) and formamidine (FA) in the optoelectronic film. Furthermore, experimental data have also indicated that, the fabricated optoelectronic film can be used as a blue emissive layer, a red emissive layer or a green emissive layer, thereby having a significant potential for application in optoelectronics industry.Type: GrantFiled: July 26, 2021Date of Patent: August 22, 2023Assignee: NATIONAL TSING HUA UNIVERSITYInventors: Hao-Wu Lin, Ho-Hsiu Chou, Chih-Li Chang, Chien-Yu Chen, Lin Yang
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Publication number: 20220302393Abstract: A halide material having general formula ArMAX is disclosed. The halide material can be processed to an optoelectronic film with a halogenated formamidine and a lead halide, and the optoelectronic film can be applied in the manufacture of an optoelectronic device like a perovskite laser or a PeLED. Experimental data have proved that, the fabricated optoelectronic film shows a property of photoluminescence (PL) peak wavelength adjustable. Moreover, the PL peak wavelength moves from 482 nm to 534 nm with the increase of the content of lead (Pb), halogen (X) and formamidine (FA) in the optoelectronic film Furthermore, experimental data have also indicated that, the fabricated optoelectronic film can be used as a blue emissive layer, a red emissive layer or a green emissive layer, thereby having a significant potential for application in optoelectronics industry.Type: ApplicationFiled: July 26, 2021Publication date: September 22, 2022Applicant: National Tsing Hua UniversityInventors: Hao-Wu Lin, Ho-Hsiu Chou, Chih-Li Chang, Chien-Yu Chen, Lin Yang
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Publication number: 20200407491Abstract: The present disclosure provides a semiconductor compound, which includes a metal complex unit and a conjugate unit. The metal complex unit includes a coordination center and a plurality of ligands. The coordination center is a metal ion or a metal atom, and the ligands are linked with the coordination center. The conjugate unit is linked with the metal complex unit by covalent bond.Type: ApplicationFiled: July 12, 2019Publication date: December 31, 2020Inventors: Ho-Hsiu Chou, Chih-Li Chang, Wei-Cheng Lin
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Patent number: 8482692Abstract: The invention provides an LCD apparatus including a backlight assembly, an LCD panel assembly and an edge-engaging assembly. In particular, the edge-engaging assembly comprises N edge-engaging members, wherein N is an integer ranging from 1 to 4. Each of the N edge-engaging members has a respective inner wall adapted to engage the corresponding edge portions of the backlight assembly and the LCD assembly.Type: GrantFiled: January 14, 2010Date of Patent: July 9, 2013Assignee: Hannstar Display CorporationInventors: Chih-Li Chang, Po-Chun Chen, Ke-Chin Chang
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Patent number: 8235573Abstract: A backlight module includes a light guide, a mixing light guide plate, and a plurality of light sources. The first light guide comprises a first side surface. The mixing light guide plate comprises an incident surface with anomalous surface and an emergent surface with fog surface. The mixing light guide plate is set on the first side surface. A plurality of light sources disposed corresponding to the incident surface, with light emitted there from and entering the mixing light guide plate through the incident surface then exits the mixing light guide plate through the emergent surface, finally, entering the light guide through the first side surface.Type: GrantFiled: March 3, 2010Date of Patent: August 7, 2012Assignee: Hannstar Display Corp.Inventor: Chih-Li Chang
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Publication number: 20100259948Abstract: A backlight module includes a light guide, a mixing light guide plate, and a plurality of light sources. The first light guide comprises a first side surface. The mixing light guide plate comprises an incident surface with anomalous surface and an emergent surface with fog surface. The mixing light guide plate is set on the first side surface. A plurality of light sources disposed corresponding to the incident surface, with light emitted there from and entering the mixing light guide plate through the incident surface then exits the mixing light guide plate through the emergent surface, finally, entering the light guide through the first side surface.Type: ApplicationFiled: March 3, 2010Publication date: October 14, 2010Applicant: HANNSTAR DISPLAY CORP.Inventor: Chih-Li Chang
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Patent number: 7796210Abstract: A flat panel display includes a backlight module, a liquid crystal display panel, and a complex diffuser plate. The liquid crystal display panel is disposed on the backlight module, and the complex diffuser plate including a first and a second diffusion layers is disposed between the backlight module and the liquid crystal display panel. Furthermore, the first diffusion layer is adjacent to the liquid crystal display panel and the second diffusion layer is adjacent to the first diffusion layer. The first and the second diffusion layers have different refractive indexes, transmittances and haze values, so that optical performance of the flat panel display is improved.Type: GrantFiled: January 5, 2006Date of Patent: September 14, 2010Assignee: Hannstar Display CorporationInventors: Chi-Jen Huang, Chih-Li Chang
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Publication number: 20100177260Abstract: The invention provides an LCD apparatus including a backlight assembly, an LCD panel assembly and an edge-engaging assembly. In particular, the edge-engaging assembly comprises N edge-engaging members, wherein N is an integer ranging from 1 to 4. Each of the N edge-engaging members has a respective inner wall adapted to engage the corresponding edge portions of the backlight assembly and the LCD assembly.Type: ApplicationFiled: January 14, 2010Publication date: July 15, 2010Inventors: Chih-Li CHANG, Po-Chun Chen, Ke-Chin Chang
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Publication number: 20100056267Abstract: A game system and method capable of collecting card symbols includes a game machine, a card symbol judging unit and a card symbol collecting unit. The game machine has a plurality of wheels which are arranged in juxtaposed and array fashion to generate a card set. Each wheel has card symbols that appear randomly. The card symbol judging unit judges whether the card symbols of the card set meet a special requirement. If confirmed positive, a selected amount of bonus game is granted. During the bonus game, special card symbols selected from a specific card symbol combination can randomly appear. The card symbol collecting unit records and collects the appeared special card symbols. When the bonus game ends, based on the collection result, a judgment is made on whether to grant points or an extra amount of the bonus game to repeat playing of the bonus game.Type: ApplicationFiled: August 27, 2008Publication date: March 4, 2010Applicant: JUMBO TECHNOLOGY CO., LTD.Inventors: Chih-Li Chang, Chang-Hsien Tsai, Ching-Yi Kao
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Patent number: 7671936Abstract: A liquid crystal display has a light guide plate, a liquid crystal panel disposed on the light guide plate, a frame having a compartment for containing the light guide plate and a frame wall having an opening and a light bar cavity, and a light bar buried in the light bar cavity via the opening.Type: GrantFiled: September 21, 2006Date of Patent: March 2, 2010Assignee: HannStar Display Corp.Inventor: Chih-Li Chang
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Patent number: 7528900Abstract: A liquid crystal display module with backlight module providing an enhancement coefficient of the brightness enhancement film (BEF) within the range of 0.1 to 0.5. The backlight module is disposed behind the display panel and comprises a bottom diffuser, a brightness enhancement film, and a top diffuser disposed on the brightness enhancement film. A set of polarizers is disposed above and below the liquid crystal display panel. The backlight module meets TCO standards and has improved optical performance.Type: GrantFiled: April 7, 2006Date of Patent: May 5, 2009Assignee: Hannstar Display CorporationInventors: Chih-Li Chang, Hung-Chen Kao, Wei-Chi Lin, Jia-Rung Juang