Patents by Inventor Chih-Lung Lin

Chih-Lung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11092861
    Abstract: An electronic device having a display panel is provided. The display panel includes a first pixel circuit, a second pixel circuit, a first signal line, a second signal line and a first buffer circuit unit. The second pixel circuit is adjacent to the first pixel circuit. The first signal line is electrically connected to the first pixel circuit. The second signal line is electrically connected to the second pixel circuit. The first buffer circuit unit is disposed between the first pixel circuit and the second pixel circuit. At least a portion of the first pixel circuit and at least a portion of the second pixel circuit are disposed between the first signal line and the second signal line.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: August 17, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Chang-Chiang Cheng, Huai-Ping Huang, Yung-Hsun Wu, Peng-Wen Wang, Chih-Lung Lin, Chia-Hao Tsai
  • Patent number: 11095904
    Abstract: Approaches to selection of motion vector (“MV”) precision during video encoding are presented. These approaches can facilitate compression that is effective in terms of rate-distortion performance and/or computational efficiency. For example, a video encoder determines an MV precision for a unit of video from among multiple MV precisions, which include one or more fractional-sample MV precisions and integer-sample MV precision. The video encoder can identify a set of MV values having a fractional-sample MV precision, then select the MV precision for the unit based at least in part on prevalence of MV values (within the set) having a fractional part of zero. Or, the video encoder can perform rate-distortion analysis, where the rate-distortion analysis is biased towards the integer-sample MV precision. Or, the video encoder can collect information about the video and select the MV precision for the unit based at least in part on the collected information.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: August 17, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Gary J. Sullivan, You Zhou, Chih-Lung Lin
  • Patent number: 11070823
    Abstract: Described tools and techniques relate to signaling for DC coefficients at small quantization step sizes. The techniques and tools can be used in combination or independently. For example, a tool such as a video encoder or decoder processes a VLC that indicates a DC differential for a DC coefficient, a FLC that indicates a value refinement for the DC differential, and a third code that indicates the sign for the DC differential. Even with the small quantization step sizes, the tool uses a VLC table with DC differentials for DC coefficients above the small quantization step sizes. The FLCs for DC differentials have lengths that vary depending on quantization step size.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: July 20, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Chih-Lung Lin, Shankar Regunathan, Sridhar Srinivasan
  • Publication number: 20210214780
    Abstract: Methods of amplifying and determining a target nucleotide sequence are provided. The method of amplifying the target nucleotide sequence includes the following steps. A first adaptor and a second adaptor are linked to two ends of a double-stranded nucleic acid molecule with a target nucleotide sequence respectively to form a nucleic acid template, in which the first adaptor includes a Y-form adaptor or a hairpin adaptor and the second adaptor is a hairpin adaptor. Then, a PCR amplification cycle is performed on the nucleic acid template to obtain a PCR amplicon of the target nucleotide sequence.
    Type: Application
    Filed: December 28, 2020
    Publication date: July 15, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Pei-Shin Jiang, Jenn-Yeh Fann, Hung-Chi Chien, Yu-Yu Lin, Chih-Lung Lin
  • Publication number: 20210209921
    Abstract: A fall detection system includes first sensing devices, second sensing devices, positioning modules, a data server and a display device. The first sensing device is configured to detect a posture of a body part of a user for obtaining body part posture data. The positioning modules are configured to detect positions of the first and second sensing devices, so as to obtain corresponding body part position data. Each of the second sensing devices is disposed on a shoe to detect a posture of a user's feet and to measure a distance from an ambient object for obtaining feet posture data and distance measurement data. The data server is configured to receive the body part posture data, the body part position data, the feet posture data and the distance measurement data to determine if the user falls down.
    Type: Application
    Filed: January 6, 2021
    Publication date: July 8, 2021
    Inventors: Chih-Lung LIN, Wen-Ching CHIU, Yuan-Hao HO
  • Publication number: 20210210198
    Abstract: A care system for predicting bed exit and suitable for a frame supporting a patient is provided. The care system includes a boundary-crossing detection system, a location sensing system, and a control circuit. The boundary-crossing detection system is coupled with the frame. The location sensing system is coupled with the frame, and is for obtaining relative position information between the patient and the frame. The control circuit is for data communicating with the boundary-crossing detection system and the location sensing system, and is for accessing care data defining multiple bed-exit behaviors. When one of following situations occurs, the control circuit transmits a warning signal: (1) the control circuit determines that, according to the relative position information and the care data, a current behavior of the patient corresponds to one of the multiple bed-exit behaviors; and (2) the boundary-crossing detection system senses that an object is passing through.
    Type: Application
    Filed: November 10, 2020
    Publication date: July 8, 2021
    Inventors: Chih-Lung LIN, Po-Ting LEE, Zong-Lin YANG
  • Patent number: 11057628
    Abstract: Various embodiments of the present technology generally relate to encoding techniques. More specifically, some embodiments relate to encoding techniques for screen data. Intra block copy (IntraBC) using motion compensation within a frame (not between frames) is very useful for encoding data captured from screen. Unfortunately, this tool is not included in most of video coding standards, including the base version of HEVC (i.e., H.265). Various embodiments of the present technology utilize encoding techniques to simulate IntraBC with compliant syntax. For example, embodiments divide a high-resolution frame into smaller areas and then encode these areas independently as if these smaller areas were independent frames.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: July 6, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: You Zhou, Chih-Lung Lin, Ming Chieh Lee
  • Publication number: 20210203957
    Abstract: When encoding/decoding a current block of a current picture using intra block copy (“BC”) prediction, the location of a reference block is constrained so that it can be entirely within an inner search area of the current picture or entirely within an outer search area of the current picture, but cannot overlap both the inner search area and the outer search area. In some hardware-based implementations, on-chip memory buffers sample values of the inner search area, and off-chip memory buffers sample values of the outer search area. By enforcing this constraint on the location of the reference block, an encoder/decoder can avoid memory access operations that are split between on-chip memory and off-chip memory when retrieving the sample values of the reference block. At the same time, a reference block close to the current block may be used for intra BC prediction, helping compression efficiency.
    Type: Application
    Filed: March 11, 2021
    Publication date: July 1, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: You Zhou, Chih-Lung Lin, Ming-Chieh Lee
  • Patent number: 11035724
    Abstract: An optical sensing circuit includes a first light sensor, a second light sensor, a third light sensor, a capacitor, and a sampling circuit. The first light sensor, the second light sensor, and the third light sensor are respectively covered by a first color filter, a second color filter, and a third color filter. The first light sensor is coupled to the capacitor, the sampling circuit, and the third light sensor. The second light sensor is coupled to the first light sensor and is configured to receive a first sensing signal. The third light sensor is coupled between the first light sensor and a voltage source.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: June 15, 2021
    Assignees: AU OPTRONICS CORPORATION, NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Chih-Lung Lin, Fu-Hsing Chen, Chia-Lun Lee, Chia-En Wu, Jian-Shen Yu
  • Publication number: 20210168383
    Abstract: Techniques and tools are described for decoding jointly coded information. For example, a decoder decodes a variable length code [“VLC”] signaled at macroblock level that jointly represents a transform type signal level, transform type, and subblock pattern. The decoder decodes one or more VLCs signaled at block level, each jointly representing a transform type and subblock pattern. The decoder may select between multiple VLC tables for the VLCs signaled macroblock level and/or block level.
    Type: Application
    Filed: February 17, 2021
    Publication date: June 3, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. HOLCOMB, Chih-Lung LIN, Shankar REGUNATHAN, Sridhar SRINIVASAN
  • Publication number: 20210168382
    Abstract: A video codec uses fractional increments of quantization step size at high bit rates to permit a more continuous variation of quality and/or bit rate as the quantization scale changes. For high bit rate scenarios, the bit stream syntax includes an additional syntax element to specify fractional step increments (e.g., half step) of the normal quantizer scale step sizes.
    Type: Application
    Filed: February 17, 2021
    Publication date: June 3, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. HOLCOMB, Sridhar SRINIVASAN, Pohsiang HSU, Chih-Lung LIN
  • Publication number: 20210138520
    Abstract: The disclosure provides a recycle apparatus. The recycle apparatus is configured to separate a back sheet and a glass sheet assembly of a photovoltaic module. The recycle apparatus includes a conveyor, a flattening device, and a cutting tool. The conveyor includes a first roller and a second roller opposite to each other. The flattening device is located aside the first roller and the second roller. The cutting tool is located aside the flattening device. The flattening device is located between the first roller and the second roller of the conveyor and the cutting tool. The first roller and the second roller is configured to clamp the photovoltaic module and to feed the photovoltaic module to the flattening device configured to flatten the photovoltaic module and to the cutting tool configured to separate the back sheet from the glass sheet assembly.
    Type: Application
    Filed: October 16, 2020
    Publication date: May 13, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Teng-Yu WANG, Chih-Lung LIN, Cheng Chuan WANG
  • Publication number: 20210125547
    Abstract: A pixel circuit including a compensation circuit, a writing circuit, a light emitting element, and a power supplying circuit is provided. The compensation circuit comprises a first node, and provides a driving current to the light emitting element according to a voltage of the first node and a system high voltage. The writing circuit provides a data voltage to the compensation circuit according to a first control signal so that the compensation circuit sets the voltage of the first node. The power supplying circuit selectively couples the compensation circuit to the light emitting element, and provides the system high voltage and a system low voltage to the compensation circuit, in which the system low voltage is configured to reset the voltage of the first node. The first control signal and the second control signal are opposite to the first emission signal and the second emission signal, respectively.
    Type: Application
    Filed: October 20, 2020
    Publication date: April 29, 2021
    Inventors: Chih-Lung LIN, Po-Cheng LAI, Ting-Ching CHU, Po-Chun LAI, Mao-Hsun CHENG
  • Patent number: 10986349
    Abstract: When encoding/decoding a current block of a current picture using intra block copy (“BC”) prediction, the location of a reference block is constrained so that it can be entirely within an inner search area of the current picture or entirely within an outer search area of the current picture, but cannot overlap both the inner search area and the outer search area. In some hardware-based implementations, on-chip memory buffers sample values of the inner search area, and off-chip memory buffers sample values of the outer search area. By enforcing this constraint on the location of the reference block, an encoder/decoder can avoid memory access operations that are split between on-chip memory and off-chip memory when retrieving the sample values of the reference block. At the same time, a reference block close to the current block may be used for intra BC prediction, helping compression efficiency.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: April 20, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: You Zhou, Chih-Lung Lin, Ming-Chieh Lee
  • Patent number: 10964245
    Abstract: A shift register circuit and a gate driver including the shift register circuit. The shift register circuit includes an input circuit, a drive circuit, a pull-down circuit, a regulator circuit and a pull-up circuit. The input circuit is configured to receive a first clock signal and is coupled to the first node. The driving circuit is configured to receive the first clock signal and a second clock signal. The input circuit is coupled to the first node. The pull-down circuit is configured to receive the voltage of the first node. The pull-down circuit is coupled to the first node and an output terminal. The pull-down circuit outputs the first voltage to the output terminal in response to the voltage of the first node.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: March 30, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Po-Cheng Lai, Mao-Hsun Cheng, Cheng-Han Huang, Yung-Chih Chen, Ching-Sheng Cheng, Chih-Lung Lin
  • Publication number: 20210092411
    Abstract: With adaptive multiple quantization, a video or other digital media codec can adaptively select among multiple quantizers to apply to transform coefficients. The switch in quantizers can be signaled at the sequence level or frame level of the bitstream syntax, or can be implicitly specified in the syntax.
    Type: Application
    Filed: December 4, 2020
    Publication date: March 25, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Chih-Lung Lin, Pohsiang Hsu, Sridhar Srinivasan
  • Patent number: 10958917
    Abstract: Techniques and tools are described for decoding jointly coded information. For example, a decoder decodes a variable length code [“VLC”] signaled at macroblock level that jointly represents a transform type signal level, transform type, and subblock pattern. The decoder decodes one or more VLCs signaled at block level, each jointly representing a transform type and subblock pattern. The decoder may select between multiple VLC tables for the VLCs signaled macroblock level and/or block level.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: March 23, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Chih-Lung Lin, Shankar Regunathan, Sridhar Srinivasan
  • Patent number: 10958916
    Abstract: A video codec uses fractional increments of quantization step size at high bit rates to permit a more continuous variation of quality and/or bit rate as the quantization scale changes. For high bit rate scenarios, the bit stream syntax includes an additional syntax element to specify fractional step increments (e.g., half step) of the normal quantizer scale step sizes.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: March 23, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Sridhar Srinivasan, Pohsiang Hsu, Chih-Lung Lin
  • Publication number: 20210074195
    Abstract: A pixel circuit includes a light emitting element, a first driver transistor, a second driver transistor, and a first compensation capacitor. A first terminal of the first driving transistor is configured to receive a power signal, and a second terminal of the first driving transistor is electrically coupled to the light emitting element. A first terminal of the second driving transistor receives the power signal, and a control terminal of the second driving transistor is electrically coupled to the light emitting element. The first compensation capacitance is electrically coupled to a control terminal of the first driving transistor and the second terminal of the second driving transistor, respectively.
    Type: Application
    Filed: November 19, 2020
    Publication date: March 11, 2021
    Inventors: Chih-Lung Lin, Chin-Hsien Tseng, Po-Cheng Lai, Yu-Sheng Lin, Mao-Hsun Cheng
  • Patent number: 10939945
    Abstract: A minimally invasive bone fracture positioning device includes a sleeve, a movable unit, and a support. The sleeve includes an alignment portion located on a longitudinal axis of the sleeve. The movable unit includes a positioning portion. The positioning portion is located on the longitudinal axis and is spaced from the alignment portion. The movable unit is mounted in a radial direction of the sleeve. The movable unit is slideable relative to the sleeve along the longitudinal axis. A support is coupled to the sleeve and the movable unit. The movable unit is spaced from the sleeve by the support.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: March 9, 2021
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Yue-Jun Wang, Chih-Hao Chang, Shih-Hua Huang, Chih-Lung Lin, Tung-Lin Tsai, Chun-Chieh Tseng, Li-Wen Weng