Abstract: A method of forming a semiconductor device includes providing a substrate including a circuit region and a well strap region, forming a mandrel extending from the circuit region to the well strap region, depositing mandrel spacers on sidewalls of the mandrel, removing the mandrel in the circuit region, while the mandrel in the well strap region remains intact, patterning the substrate with the mandrel spacers in the circuit region and the mandrel in the well strap region as an etch mask, thereby forming at least a first fin in the circuit region and a second fin in the well strap region, and epitaxially growing a first epitaxial feature over the first fin in the circuit region and a second epitaxial feature over the second fin in the well strap region. A width of the second fin is larger than a width of the first fin.

Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.

Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.

Abstract: A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.

Abstract: The battery pack with the plurality of batteries is determined to have been fully charged and set in a stationary state, the discharge operation proceeds according to specified relationships of the voltage of each battery, a first predetermined voltage difference, and a discharge starting voltage, or the balance operation proceeds according to specified relationships of the voltage of each battery, the first predetermined voltage difference, a balance starting voltage and a second predetermined voltage difference.

Abstract: An impedance measurement circuit and an operating method thereof are provided. The impedance measurement circuit includes a current source, a voltage controlled oscillator (VCO), an operation circuit, and a first delay circuit. The current source, electrically connected to a power rail, is able to sink a current from the power rail according to the delayed clock signal. The VCO is configured to generate an oscillation signal according to a power voltage on the power rail. The operation circuit is electrically connected to the VCO and is configured to receive a sampling clock signal and the oscillation signal, sense the power voltage to generate a sampled signal, and accumulate the sampled signal to generate a measurement result. The first delay circuit, electrically connected to the current source and the operation circuit, is able to receive the sampling clock signal and transmit the delayed clock signal to the current source.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: An integrated circuit structure includes a first metal feature formed into a first dielectric layer, a second metal feature formed into a second dielectric layer, the second dielectric layer being disposed on said first dielectric layer, and a via connecting the first metal feature to the second metal feature, wherein a top portion of the via is offset from a bottom portion of the via.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: An antenna apparatus includes a feeding antenna inside an electronic device and one or more antenna elements, such as a floating metal antenna, disposed on a rear cover of the electronic device. The floating metal antenna and a feeding antenna inside the electronic device may form a coupling antenna structure. The feeding antenna may be an antenna fastened on an antenna support (which may be referred to as a support antenna). The feeding antenna may alternatively be a slot antenna formed by slitting on a metal middle frame of the electronic device. The antenna apparatus may be implemented in limited design space, thereby effectively saving antenna design space inside the electronic device. The antenna apparatus may generate excitation of a plurality of resonance modes, so that antenna bandwidth and radiation characteristics can be improved.

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a gate structure sandwiched between and in contact with a first spacer feature and a second spacer feature, a top surface of the first spacer feature and a top surface of the second spacer feature extending above a top surface of the gate structure, a gate self-aligned contact (SAC) dielectric feature over the first spacer feature and the second spacer feature, a contact etch stop layer (CESL) over the gate SAC dielectric feature, a dielectric layer over the CESL, a gate contact feature extending through the dielectric layer, the CESL, the gate SAC dielectric feature, and between the first spacer feature and the second spacer feature to be in contact with the gate structure, and a liner disposed between the first spacer feature and the gate contact feature.

Abstract: A display device includes a screen, a screen stand and a fixing module. The screen stand is pivotally connected to the screen. The fixing module is connected to the screen stand and configured to clamp a first surface and a second surface of a board and includes a connecting element, a first abutting element and a second abutting element. The first abutting element is fixed to the connecting element and configured to abut against the first surface of the board. The second abutting element is pivotally connected to the connecting element and includes an abutting end configured to abut against the second surface of the board.

Abstract: A magnetic template with adjustable magnetic force is provided. The magnetic template is applied to a display device. The display device can be fixed on a plane by the magnetic template, wherein the magnetic template includes an assembly shell and an adjustment element. A magnetic element is arranged inside the assembly shell. The adjustment element is arranged in the assembly shell and is configured to adjust the magnetic force of the magnetic element relative to the plane or adjust the magnetic force of the magnetic element.

Abstract: A display device includes a screen, a screen support and a fixing module. The screen support is pivotally connected to the screen, and the screen support includes a first end and a second end. The fixing module is detachably connected to the screen support and includes a first sub-component and a second sub-component. The first sub-component has a first surface and a second surface, and the first sub-component is selectively connected to one of the first end and the second end. The second sub-component has a third surface and a fourth surface, and the second sub-component is configured for clamping a board. One of the first surface and the second surface of the first sub-component and one of the third surface and the fourth surface of the second sub-component are detachably connected.

Abstract: A touch display device includes several LED units and several switches. Each LED unit includes a LED and a photo sensor. The switches are electrically coupled to the LED units. During a conductive period of a conductive one of the switches, the LEDs and the photo sensor coupled to the conductive one are enabled non-simultaneously.

Abstract: A head-up display system for a vehicle is provided. The vehicle includes a dashboard body and a front window above the dashboard body. The head-up display system includes a display device. The display device includes a display screen. The display device is rotatably disposed on the dashboard body and shifts between a first position and a second position. When the display device is in the first position, the display screen of the display device faces the front window. When the display device is in the second position, the display screen does not face the front window.

Abstract: A processing chamber includes a grid and a first disk. The grid includes a plurality of holes arranged in the processing chamber. The grid partitions the processing chamber into a first chamber in which plasma is generated and a second chamber in which a pedestal is configured to support a substrate. The first disk is arranged in the second chamber. The first disk is movable between the grid and the substrate when supported on the pedestal.

Abstract: A magnetic template with adjustable magnetic force is provided. The magnetic template is applied to a display device. The display device can be fixed on a plane by the magnetic template, wherein the magnetic template includes an assembly shell and an adjustment element. A magnetic element is arranged inside the assembly shell. The adjustment element is arranged in the assembly shell and is configured to adjust the magnetic force of the magnetic element relative to the plane or adjust the magnetic force of the magnetic element.

Abstract: The disclosure provides an electronic device. The electronic includes an internal battery, a first converter, a processor and a control circuit. The first converter is used to convert electrical power provided by the internal battery or provided by an external power source into a first power signal. The processor operates in an “ON-state” or switches to an “OFF-state”. The control circuit is used to control the first converter, so that the first converter selectively provides the first power signal to the processor.

Abstract: A display device includes a screen, a screen stand and a fixing module. The screen stand is pivotally connected to the screen. The fixing module is connected to the screen stand and configured to clamp a first surface and a second surface of a board and includes a connecting element, a first abutting element and a second abutting element. The first abutting element is fixed to the connecting element and configured to abut against the first surface of the board. The second abutting element is pivotally connected to the connecting element and includes an abutting end configured to abut against the second surface of the board.