Patents by Inventor Chih-Pin Chen

Chih-Pin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240160844
    Abstract: The present disclosure provides a synonym searching method, which includes steps as follows. When receiving the vocabulary and the definition of the vocabulary from the user device, the natural language processing model is used to search the synonym of the vocabulary from the data governance dictionary according to the definition of the vocabulary; after providing the synonym to the user device, feedback information about the synonym is received from the user device, and the feedback information is used as the token of the vocabulary for the natural language processing model.
    Type: Application
    Filed: February 8, 2023
    Publication date: May 16, 2024
    Inventors: Wei-Chao CHEN, Chen-I HUANG, Yu-Lun CHANG, Chuo-Jui WU, Chih-Pin WEI
  • Publication number: 20240161158
    Abstract: The present disclosure proposes a service plan automatic generation system and operation method thereof. The operation method includes a method for generating standardized items based on a service record, which includes the following steps: analyzing multiple instances to generate multiple feature tags, generating multiple word frequency vectors corresponding to the feature tags according to the instances, and performing an aggregation procedure for a plurality of times. Each time performing the aggregation procedure includes: executing a clustering algorithm to divide multiple instances into multiple groups, analyzing multiple variable parts and an identical part of multiple feature vectors in each group, outputting the variable parts as feature tag sets, and using the identical part as an index of the group, when a stop condition is detected, the index generated by the aggregation procedure in the last time is outputted as a standardized item.
    Type: Application
    Filed: March 1, 2023
    Publication date: May 16, 2024
    Inventors: Yu-Lun Chang, Wei-Chao Chen, Chih-Pin Wei, Yao Yu Chung, Ying Chieh Kung, Yu Chang Chang
  • Publication number: 20240154972
    Abstract: A method for permission management includes: generating a plurality of job roles with different permissions according to organization permission table; generating first permission structure directed graph according to the job roles; selecting one of the job roles in first permission structure directed graph as target job role; generating minimum directed spanning graph in first permission structure directed graph according to target job role; determining whether permission of each of the job roles in first permission structure directed graph matches job of each of the job roles in first permission structure directed graph; and adjusting permission and job of each of the job roles to generate second permission structure directed graph if it is determined that permission of each of the job roles in first permission structure directed graph does not match job of each of the job roles in first permission structure directed graph.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 9, 2024
    Inventors: Wei-Chao CHEN, Ming-Chi CHANG, Chih-Pin WEI, Chuo-Jui WU
  • Publication number: 20240147658
    Abstract: A fan module and computing device with the fan module are disclosed. The fan module includes a handle configured to actuate between an operation state and a release state. The handle in the release state allows a user to vertically remove the fan module from its respective fan module slot and away from the bottom panel.
    Type: Application
    Filed: January 11, 2023
    Publication date: May 2, 2024
    Inventors: Chao-Jung CHEN, Chih-Hsiang LEE, Wei-Pin CHEN, Jyue HOU, Cheng-Chieh WENG
  • Publication number: 20240113061
    Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Mei-Ju LU, Chi-Han CHEN, Chang-Yu LIN, Jr-Wei LIN, Chih-Pin HUNG
  • Patent number: 11948800
    Abstract: A device includes a pair of gate spacers on a substrate, and a gate structure on the substrate and between the gate spacers. The gate structure includes an interfacial layer, a metal oxide layer, a nitride-containing layer, a tungsten-containing layer, and a metal compound layer. The interfacial layer is over the substrate. The metal oxide layer is over the interfacial layer. The nitride-containing layer is over the metal oxide layer. The tungsten-containing layer is over the nitride-containing layer. The metal compound layer is over the tungsten-containing layer. The metal compound layer has a different material than a material of the tungsten-containing layer.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Yu Chen, Yu-Chi Lu, Chih-Pin Tsao, Shih-Hsun Chang
  • Publication number: 20240105521
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate having a base, a first fin, and a second fin over the base. The method includes forming a first trench in the base and between the first fin and the second fin. The method includes forming an isolation layer over the base and in the first trench. The first fin and the second fin are partially in the isolation layer. The method includes forming a first gate stack over the first fin and the isolation layer. The method includes forming a second gate stack over the second fin and the isolation layer. The method includes removing a bottom portion of the base. The isolation layer passes through the base after the bottom portion of the base is removed.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Da-Zhi ZHANG, Chung-Pin HUANG, Po-Nien CHEN, Hsiao-Han LIU, Jhon-Jhy LIAW, Chih-Yung LIN
  • Publication number: 20240087057
    Abstract: A power consumption monitoring device includes a sensor, a storage, and a processor. The sensor is configured to detect a power-consuming device quantity and a power consumption amount. The storage is configured to store the power-consuming device quantity and the power consumption amount. The processor is communicatively connected to the sensor and the storage. The processor is configured to calculate a power-consuming device idling indicator based on the power-consuming device quantity and the power consumption amount in a monitoring time interval, wherein the power-consuming device idling indicator is used for indicating a deviation status of the power-consuming device quantity and the power consumption amount. The processor is further configured to determine whether the power-consuming device idling indicator exceeds a warning threshold. In response to the power-consuming device idling indicator exceeding the warning threshold, the processor is further configured to generate a warning message.
    Type: Application
    Filed: December 20, 2022
    Publication date: March 14, 2024
    Inventors: Wei-Chao CHEN, Ming-Chi CHANG, Chih-Pin WEI, Ke-Li WU, Hua-Hsiu CHIANG, Yu-Lun CHANG
  • Publication number: 20240087861
    Abstract: In an embodiment, a magnetic assembly includes: an inner permeance annulus; and an outer permeance annulus connected to the inner permeance annulus via magnets, wherein the outer permeance annulus comprises a peak region with a thickness greater than other regions of the outer permeance annulus.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Tsung-Jen YANG, Yi-Zhen CHEN, Chih-Pin WANG, Chao-Li SHIH, Ching-Hou SU, Cheng-Yi HUANG
  • Patent number: 11923310
    Abstract: A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Kai Cheng, Tsung-Shu Lin, Tsung-Yu Chen, Hsien-Pin Hu, Wen-Hsin Wei
  • Patent number: 11923358
    Abstract: A device comprises a first transistor, a second transistor, a first contact, and a second contact. The first transistor comprises a first gate structure, first source/drain regions on opposite sides of the first gate structure, and first gate spacers spacing the first gate structure apart from the first source/drain regions. The second transistor comprises a second gate structure, second source/drain regions on opposite sides of the second gate structure, and second gate spacers spacing the second gate structure apart from the second source/drain regions. The first contact forms a first contact interface with one of the first source/drain regions. The second contact forms a second contact interface with one of the second source/drain regions. An area ratio of the first contact interface to top surface the first source/drain region is greater than an area ratio of the second contact interface to top surface of the second source/drain region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Pin Huang, Hou-Yu Chen, Chuan-Li Chen, Chih-Kuan Yu, Yao-Ling Huang
  • Patent number: 11916031
    Abstract: A semiconductor device including a first die and a second die bonded to one another. The first die includes a first passivation layer over a substrate, and first bond pads in the first passivation layer. The second die includes a second passivation layer, which may be bonded to the first passivation layer, and second bond pads in the second passivation layer, which may be bonded to the first bond pads. The second bond pads include inner bond pads and outer bond pads. The outer bond pads may have a greater diameter than the inner bond pads as well as the first bond pads.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chia Hu, Ching-Pin Yuan, Sung-Feng Yeh, Sen-Bor Jan, Ming-Fa Chen
  • Publication number: 20120298759
    Abstract: A storage card includes a lower cover, nine pins mounted on a bottom of the lower cover, a memory card mounted on the lower cover, a chip card connector mounted on the lower cover, and an upper cover engaged on the lower cover. The memory card is electrically connected to the nine pins. The chip card connector is electrically connected to six of the nine pins. The upper cover receives a chip card which comprises six contacts on its bottom. The upper cover defines an opening. The chip card connector is to pass through the opening to contact the six contacts of the chip card.
    Type: Application
    Filed: August 1, 2011
    Publication date: November 29, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHIH-PIN CHEN
  • Publication number: 20120300414
    Abstract: A multi-function dummy card inserted in an electronic card slot of an electronic device includes a lower cover, a main board fixed on the lower cover, an upper cover fixed on the main board, and a first button received into the upper cover. The lower cover includes a laser. The main board includes a chargeable battery for providing power for the laser. When the first button is pressed to contact the main board, the main board generates a first signal to turn on the laser.
    Type: Application
    Filed: August 1, 2011
    Publication date: November 29, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHIH-PIN CHEN
  • Patent number: 8115116
    Abstract: A casing with a shielding function, a method for manufacturing the same and an electronic device using the same are disclosed. The electronic device has at least an electronic element and a casing. The casing includes a casing substrate and a film integrally formed with the casing substrate via an in-mold decoration process. The film includes a shielding layer for providing an electromagnetic shielding function for the electronic element and an adhesive layer for combining the casing substrate and the shielding layer.
    Type: Grant
    Filed: January 5, 2009
    Date of Patent: February 14, 2012
    Assignee: Asustek Computer Inc.
    Inventor: Chih-Pin Chen
  • Patent number: 7983000
    Abstract: A removable hard disk device includes a handle, a first holder, a hard disk drive located between the handle and the first holder, and two second holders pivotally connected to ends of the first holder and detachably connected to ends of the handle with the two second holders firmly holding the hard disk drive there between and detachably connected to the disk drive. When the second holders are forced to pivotally move outwardly relative to each other, the second holders will be separated from the first holder and the handle such that the hard disk drive can be dismounted from the first holder without using any tool.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: July 19, 2011
    Assignee: Universal Scientific Industrial Co., Ltd.
    Inventors: Chih-Pin Chen, Te-Sheng Liu, Kuo-Kuang Liu, Shin-Hsun Yang
  • Patent number: 7945794
    Abstract: A portable computer with a power control function is disclosed to include a first body, a hinge, a second body coupled to the first body through the hinge, an optical sensor having a transmitter and a receiver and mounted on the first body, an optical grating connected to the hinge and having a part located between the transmitter and the receiver, a control circuit, and an electronic component. When the second body is turned relative to the first body, the optical sensor generates a first sensing voltage and a second sensing voltage subject to the turning action of the optical grating so that the control circuit controls the power of the electronic component based on the first sensing voltage and the second sensing voltage provided by the optical sensor.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: May 17, 2011
    Assignee: ASUSTeK Computer Inc.
    Inventor: Chih-Pin Chen
  • Publication number: 20090296322
    Abstract: A case unit for a storage device includes a main case having an accommodation chamber, a subsidiary case detachably and drawably mounted in the accommodation chamber of the main case, and a circuit board mounted with the subsidiary case. As long as the subsidiary case is taken out of the accommodation chamber of the main case, the circuit board can be repaired, thereby enhancing convenience of assembly and repair works.
    Type: Application
    Filed: June 2, 2008
    Publication date: December 3, 2009
    Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL CO., LTD
    Inventors: Shin-Hsun Yang, Te-Sheng Liu, Chih-Pin Chen, Kuo-Kuang Liu, Chien-Ta Lin
  • Publication number: 20090183913
    Abstract: A casing with a shielding function, a method for manufacturing the same and an electronic device using the same are disclosed. The electronic device has at least an electronic element and a casing. The casing includes a casing substrate and a film integrally formed with the casing substrate via an in-mold decoration process. The film includes a shielding layer for providing an electromagnetic shielding function for the electronic element and an adhesive layer for combining the casing substrate and the shielding layer.
    Type: Application
    Filed: January 5, 2009
    Publication date: July 23, 2009
    Applicant: ASUSTek COMPUTER INC.
    Inventor: Chih-Pin CHEN
  • Patent number: D902585
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: November 24, 2020
    Inventor: Chih-Pin Chen