Abstract: A method of making a cushion material includes the steps of pressing a pad onto a die with a plurality of protrusions to form a plurality of protrusion portions on the pad, and then attaching an upper layer on transversely cutting the protrusion portions of the pad to separate the upper layer and the die and form the pad with a plurality of pad members thereon, and then attaching a lower layer on the other side of the pad members to form a three-layer cushion material.

Abstract: A method of making a cushion material includes the steps of pressing a pad onto a die with a plurality of protrusions to form a plurality of protrusion portions on the pad, and then attaching an upper layer on transversely cutting the protrusion portions of the pad to separate the upper layer and the die and form the pad with a plurality of pad members thereon, and then attaching a lower layer on the other side of the pad members to form a three-layer cushion material.

Abstract: A method is disclosed for determining a size of an interconnect between a first and a second conductor respectively in two layers of an integrated circuit while scaling from a reference processing technology to a predetermined processing technology. The method comprises selecting a set of design rules for the conductors based on the predetermined processing technology, determining a length of a first side of a rectangular cross sectional area of the interconnect based on the design rules and a scaling rule for scaling such a length from the reference processing technology to the predetermined processing technology, and determining a length of a second side of the cross sectional area of the interconnect for compensating an increase of a resistance of the interconnect due to the scaling from the reference processing technology to the predetermined processing technology.

Abstract: In one embodiment, the disclosure relates to a method and apparatus for inserting dummy patterns in sparsely populated portions of a metal layer. The dummy pattern counters the effects of variations of pattern density in a semiconductor layout which can cause uneven post-polish film thickness. An algorithm according to one embodiment of the disclosure determines the size and location of the dummy patterns based on the patterns in the metal layer by first surrounding the metal structure with small dummy pattern and then filling any remaining voids with large dummy patterns.

Abstract: In one embodiment, the disclosure relates to a method and apparatus for inserting dummy patterns in sparsely populated portions of a metal layer. The dummy pattern counters the effects of variations of pattern density in a semiconductor layout which can cause uneven post-polish film thickness. An algorithm according to one embodiment of the disclosure determines the size and location of the dummy patterns based on the patterns in the metal layer by first surrounding the metal structure with small dummy pattern and then filling any remaining voids with large dummy patterns.