Patents by Inventor Chih-Wei Hsieh

Chih-Wei Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145421
    Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Inventors: Kuan-Neng CHEN, Zhong-Jie HONG, Chih-I CHO, Ming-Wei WENG, Chih-Han CHEN, Chiao-Yen WANG, Ying-Chan HUNG, Hong-Yi WU, CHENG-YEN HSIEH
  • Patent number: 11951638
    Abstract: A method for determining a standard depth value of a marker includes obtaining a maximum depth value of the marker. A reference depth value of the marker is obtained based on a depth image of the marker, and a Z-axis coordinate value of the marker is obtained based on a color image of the marker. When the reference depth value and the Z-axis coordinate value are both less than the maximum depth value, and a difference between the reference depth value and the Z-axis coordinate value is not greater than 0, the depth reference value is set as the standard depth value of the marker; and when the difference is greater than 0, the Z-axis coordinate value is set as the standard depth value of the marker.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: April 9, 2024
    Assignee: Chiun Mai Communication Systems, Inc.
    Inventors: Tung-Chun Hsieh, Chung-Wei Wu, Chih-Wei Li, Chia-Yi Lin
  • Patent number: 11949001
    Abstract: The present disclosure provides a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes channel members disposed over a substrate, a gate structure engaging the channel members, and an epitaxial feature adjacent the channel members. At least one of the channel members has an end portion in physical contact with an outer portion of the epitaxial feature. The end portion of the at least one of the channel members includes a first dopant of a first concentration. The outer portion of the epitaxial feature includes a second dopant of a second concentration. The first concentration is higher than the second concentration.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Ching Wang, Chung-I Yang, Jon-Hsu Ho, Wen-Hsing Hsieh, Kuan-Lun Cheng, Chung-Wei Wu, Zhiqiang Wu
  • Publication number: 20240107682
    Abstract: An embodiment composite material for semiconductor package mount applications may include a first component including a tin-silver-copper alloy and a second component including a tin-bismuth alloy or a tin-indium alloy. The composite material may form a reflowed bonding material having a room temperature tensile strength in a range from 80 MPa to 100 MPa when subjected to a reflow process. The reflowed bonding material may include a weight fraction of bismuth that is in a range from approximately 4% to approximately 15%. The reflowed bonding material may an alloy that is solid solution strengthened by a presence of bismuth or indium that is dissolved within the reflowed bonding material or a solid solution phase that includes a minor component of bismuth dissolved within a major component of tin. In some embodiments, the reflowed bonding material may include intermetallic compounds formed as precipitates such as Ag3Sn and/or Cu6Sn5.
    Type: Application
    Filed: April 21, 2023
    Publication date: March 28, 2024
    Inventors: Chao-Wei Chiu, Chih-Chiang Tsao, Jen-Jui Yu, Hsuan-Ting Kuo, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240106114
    Abstract: A radio device includes a first antenna array and an actuator. The first antenna array is configured to transmit a radiation beam to a remote device. The actuator is configured to change an orientation of the first antenna array, whereby a beam direction of the radiation beam is changed according to a change of the orientation of the first antenna array. The beam direction of the radiation beam is adjusted according to a beam steering mechanism performed by the first antenna array.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Inventors: Shih-Wei HSIEH, Wei-Hsuan CHANG, Chih-Wei LEE, Shyh-Tirng FANG
  • Publication number: 20240071952
    Abstract: A method includes depositing solder paste over first contact pads of a first package component. Spring connectors of a second package component are aligned to the solder paste. The solder paste is reflowed to electrically and physically couple the spring connectors of the second package component to the first contact pads of the first package component. A device includes a first package component and a second package component electrically and physically coupled to the first package component by way of a plurality of spring coils. Each of the plurality of spring coils extends from the first package component to the second package component.
    Type: Application
    Filed: January 10, 2023
    Publication date: February 29, 2024
    Inventors: Chih-Chiang Tsao, Hsuan-Ting Kuo, Chao-Wei Chiu, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240072413
    Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu HO, Meng-Wei HSIEH, Chih-Pin HUNG
  • Patent number: 11728170
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: August 15, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Ying Lin, Cheng-Yi Wu, Alan Tu, Chung-Liang Cheng, Li-Hsuan Chu, Ethan Hsiao, Hui-Lin Sung, Sz-Yuan Hung, Sheng-Yung Lo, C. W. Chiu, Chih-Wei Hsieh, Chin-Szu Lee
  • Publication number: 20210335616
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Application
    Filed: July 8, 2021
    Publication date: October 28, 2021
    Inventors: Hong-Ying LIN, Cheng-Yi WU, Alan TU, Chung-Liang CHENG, Li-Hsuan CHU, Ethan HSIAO, Hui-Lin SUNG, Sz-Yuan HUNG, Sheng-Yung LO, C.W. CHIU, Chih-Wei HSIEH, Chin-Szu LEE
  • Patent number: 11062908
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: July 13, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Ying Lin, Cheng-Yi Wu, Alan Tu, Chung-Liang Cheng, Li-Hsuan Chu, Ethan Hsiao, Hui-Lin Sung, Sz-Yuan Hung, Sheng-Yung Lo, C. W. Chiu, Chih-Wei Hsieh, Chin-Szu Lee
  • Patent number: 10763116
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: September 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Ying Lin, Cheng-Yi Wu, Alan Tu, Chung-Liang Cheng, Li-Hsuan Chu, Ethan Hsiao, Hui-Lin Sung, Sz-Yuan Hung, Sheng-Yung Lo, C. W. Chiu, Chih-Wei Hsieh, Chin-Szu Lee
  • Publication number: 20200043739
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 6, 2020
    Inventors: Hong-Ying LIN, Cheng-Yi WU, Alan TU, Chung-Liang CHENG, Li-Hsuan CHU, Ethan HSIAO, Hui-Lin SUNG, Sz-Yuan HUNG, Sheng-Yung LO, C.W. CHIU, Chih-Wei Hsieh, Chin-Szu LEE
  • Publication number: 20190131134
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Inventors: Hong-Ying LIN, Cheng-Yi Wu, Alan Tu, Chung-Liang Cheng, Li-Hsuan Chu, Ethan Hsiao, Hui-Lin Sung, Sz-Yuan Hung, Sean Lo, C.W. Chiu, Chih-Wei Hsieh, Chin-Szu Lee
  • Publication number: 20170265251
    Abstract: A far infrared electrically and thermally conductive electrode device includes an electrode set and a connection assembly, through which the electrode set is connected to the case of a host in a wireless way. The electrode set is both electrically and thermally conductive. The method for making the electrode of the electrode device includes steps of disposing an electrode protecting layer on a first side of a far infrared heating layer; disposing an electrode insulating layer on a second side of the far infrared heating layer; disposing an electrode layer on the surface of the electrode insulating layer; and covering the electrode layer with a conducting gel layer. Through the above-mentioned structure, the electrode set emits far infrared rays and generates heat when the host supplies power. The electrode set becomes conductive to simulate nerves of different layers of tissue under a person's skin.
    Type: Application
    Filed: March 9, 2017
    Publication date: September 14, 2017
    Applicant: EASYWELL BIOMEDICALS, INC.
    Inventors: CHENG-LIN CHUANG, CHIH-WEI HSIEH
  • Publication number: 20140174312
    Abstract: The disclosure provides a composition for gravure offset printing, including 7-92 parts by weight of a functional material, 1-76 parts by weight of a polymer, 4-13 parts by weight of a solvent, and 1-2.5 parts by weight of an additive, wherein a surface tension of the composition is between 20-40 mN/m. The disclosure further provides a gravure offset printing process, including providing a template containing a gravure pattern, filling the composition in the gravure pattern of the template, transferring the composition from the template onto a blanket, and transferring the composition from the blanket to a substrate, wherein a transfer ratio of the composition from the blanket to the substrate is above 80%.
    Type: Application
    Filed: November 8, 2013
    Publication date: June 26, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Ming WANG, Chih-Wei HSIEH
  • Patent number: 8657491
    Abstract: This present invention discloses a detachable probe cover for an ear thermometer and a manufacturing method thereof. The detachable probe cover for the ear thermometer is for being mounted onto a measuring probe of the ear thermometer, wherein a combining mechanism is provided at a bottom of the measuring probe and the detachable probe cover comprises a main body of a hollow structure and a base, in which the main body has an open end and a closed end opposite to the open end, and the hollow structure has a diameter gradually reducing from the open end toward the closed end.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: February 25, 2014
    Assignee: Actherm Inc.
    Inventor: Chih-Wei Hsieh
  • Publication number: 20120256198
    Abstract: A LED package structure for increasing the light uniforming effect includes a substrate unit, a light emitting unit, a first package unit, and a second package unit. The substrate unit includes at least one substrate body. The light emitting unit includes at least one light emitting element disposed on the at least one substrate body and electrically connected to the at least one substrate body. The first package unit includes a first package resin body formed on the at least one substrate body to cover the at least one light emitting element. The second package unit includes a second package resin body formed on the at least one substrate body to cover the first package resin body. The second package resin body is a light uniforming resin body having a light diffusing material mixed therein, and the second package resin body has an exposed light uniforming surface formed thereon.
    Type: Application
    Filed: September 21, 2011
    Publication date: October 11, 2012
    Applicant: LUSTROUS TECHNOLOGY LTD.
    Inventors: CHIN-KAI HUANG, CHIH-WEI HSIEH, CHIA-LUNG HSUEH, SHIH-MIN WU, DAWSON LIU
  • Patent number: 8192079
    Abstract: A disposable thermometer probe sheath includes a bottom piece and a plastic cover film sealed onto the bottom piece. The plastic cover film comprising an upper plastic sheet film and a lower plastic sheet film, each of which has a front edge provided with an opening, a rear edge provided with a tip, and a sealed peripheral edge except for the opening, so as to receive a thermometer probe. The plastic cover film is made of a flexible and deformable material, while the plastic cover film is provided with two notches respectively formed on two side edges adjacent to the tip. The upper plastic sheet film is provided with a first flap attached to the opening thereof, while the lower plastic sheet film is provided with a second flap attached to the opening. When the thermometer probe is inserted into the plastic cover film, the notches are tightly engaged with the thermometer probe.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: June 5, 2012
    Assignee: Actherm Inc.
    Inventor: Chih-Wei Hsieh