Patents by Inventor Chih-Wei Yeh

Chih-Wei Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240176094
    Abstract: An optical system is provided, including a first module configured to hold a first optical member. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the fixed portion.
    Type: Application
    Filed: November 28, 2023
    Publication date: May 30, 2024
    Inventors: Chia-Che WU, Chao-Chang HU, Yung-Hsien YEH, Chih-Wei WENG, Chih-Wen CHIANG, Yu-Chiao LO, Sin-Jhong SONG
  • Publication number: 20240176159
    Abstract: An optical system that includes a first module is provided. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the first fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the first fixed portion.
    Type: Application
    Filed: November 28, 2023
    Publication date: May 30, 2024
    Inventors: Chia-Che WU, Chao-Chang HU, Yung-Hsien YEH, Chih-Wei WENG, Chih-Wen CHIANG, Yu-Chiao LO, Sin-Jhong SONG
  • Publication number: 20240170046
    Abstract: A memory device, such as three dimension AND Flash memory, including a plurality of word line decoding circuit areas, a plurality of common power rails and a plurality of power drivers is provided. The word line decoding circuit areas are arranged in an array, and form a plurality of isolation areas, wherein each of the isolation areas is disposed between two adjacent word line decoding circuit areas. Each of the common power rails is disposed along the isolation areas. The power drivers respectively correspond to the word line decoding circuit areas. Each of the power drivers is disposed between each of the power driving circuit areas and each of the corresponding isolation areas, wherein each of the power drivers is configured to provide a common power to the word line decoding circuit areas.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Teng-Hao Yeh, Hang-Ting Lue, Chih-Wei Hu
  • Patent number: 11990429
    Abstract: A method includes bonding a second package component to a first package component, bonding a third package component to the first package component, attaching a dummy die to the first package component, encapsulating the second package component, the third package component, and the dummy die in an encapsulant, and performing a planarization process to level a top surface of the second package component with a top surface of the encapsulant. After the planarization process, an upper portion of the encapsulant overlaps the dummy die. The dummy die is sawed-through to separate the dummy die into a first dummy die portion and a second dummy die portion. The upper portion of the encapsulant is also sawed through.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Wei Wu, Ying-Ching Shih, Kung-Chen Yeh, Li-Chung Kuo, Pu Wang, Szu-Wei Lu
  • Patent number: 11990351
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: May 21, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
  • Patent number: 11985822
    Abstract: A memory device is provided. The memory device includes a stacked structure, a tubular element, a conductive pillar and memory cells. The tubular element includes a dummy channel layer and penetrates the stacked structure. The conductive pillar is enclosed by the tubular element and extending beyond a bottom surface of the dummy channel layer. The memory cells are in the stacked structure and electrically connected to the conductive pillar.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: May 14, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Teng-Hao Yeh, Chih-Wei Hu, Hang-Ting Lue, Guan-Ru Lee
  • Publication number: 20240148262
    Abstract: Apparatuses and methods for calculating heart rate are disclosed herein. The apparatus can include a processor configured to calculate heart rate information. The processor includes a heart rate calculator including a memory configured to store a PPG signal and a calculation element coupled to the memory and configured to calculate a heart rate value and generate at least one quality checking factor according to the PPG signal. The processor also includes a checking element configured to determine a validity indicator according to the at least one quality checking factor, a memory control element coupled to the memory and configured to access the memory to transmit the PPG signal, and a multiplexer configured to output the PPG signal accessed by the memory control element or the heart rate value calculated by the calculation element according to the validity indicator.
    Type: Application
    Filed: August 26, 2023
    Publication date: May 9, 2024
    Inventors: Jui-Wei Tsai, Kai-Wei Chiu, Chih-Wei Yeh
  • Publication number: 20240154447
    Abstract: A power system including a first battery pack, a second battery pack, and a power management circuit is disclosed. The first battery pack has a first end and a second end, and has a first battery capacity. The second battery pack has a third end and a fourth end. The third end is coupled to the second end of the first battery pack and provides a low battery voltage. The fourth end is grounded, the second battery pack has a second battery capacity, and the second battery capacity is greater than the first battery capacity. The power management circuit is coupled to the second battery pack to receive the low battery voltage, and provides a component operating voltage to an electronic components based on the low battery voltage.
    Type: Application
    Filed: August 29, 2023
    Publication date: May 9, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Yi-Hsuan Lee, Liang-Cheng Kuo, Chun-Wei Ko, Ya Ju Cheng, Chih Wei Huang, Ywh Woei Yeh, Yu Cheng Lin, Yen Ting Wang
  • Patent number: 11976965
    Abstract: An optical detector module can be used to implement proximity sensing function by detecting ambient light outside of the optical detector module in accordance with a first detection threshold. An optical detector module can be further used to implement other active functions such as material detection (e.g., skin) or depth-sensing by emitting one or more optical signals (e.g., light pulses at a specific wavelength) and detecting the reflected optical signals relative to a second and/or third detection threshold. The disclosure provides technical solutions for actively monitoring detection threshold(s) of an optical detector module to achieve better power management. In some embodiments, such solutions are useful for photodetectors having a wide sensing bandwidth, such as a photodetector formed in germanium or a photodetector comprising an absorption region comprising germanium.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: May 7, 2024
    Assignee: Artilux, Inc.
    Inventors: Kai-Wei Chiu, Chih-Wei Chen, Chih-Wei Yeh
  • Publication number: 20240128211
    Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.
    Type: Application
    Filed: April 27, 2023
    Publication date: April 18, 2024
    Inventors: Chih-Wei WU, An-Jhih SU, Hua-Wei TSENG, Ying-Ching SHIH, Wen-Chih CHIOU, Chun-Wei CHEN, Ming Shih YEH, Wei-Cheng WU, Der-Chyang YEH
  • Publication number: 20240121954
    Abstract: A memory device includes a first stack structure including first gate layers and first insulating layers alternately stacked with each other. A first channel pillar extends through the first stack structure. A second stack structure is located on the first stack structure and includes second gate layers and second insulating layers alternately stacked with each other. A second channel pillar extends through the second stack structure and is separated from the first channel pillar. A first conductive pillar and a second conductive pillar are located in and electrically connecting with the first channel pillar and the second channel pillar. A charge storage structure is located between the first gate layers and the first channel pillar, and between the second gate layers and the second channel pillar. The memory device may be applied to a 3D AND flash memory.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Chih-Wei Hu, Teng-Hao Yeh
  • Fan
    Patent number: 11952915
    Abstract: A fan includes a hub and a plurality of fan blades. The hub has an axle center. The fan blades are disposed around the hub. Each of the fan blades has a bent portion, and the bent portions of the fan blades are extended along a surrounding direction surrounding the axle center. The hub is welded with the bent portion of each of the fan blades along the surrounding direction. As a result, the number of fan blades is maximized, the strength is simultaneously ensured to be enough, and the advantages of effectively enhancing the fan characteristics are achieved.
    Type: Grant
    Filed: June 13, 2023
    Date of Patent: April 9, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Ching-Hsien Yeh, Chih-Wei Chan
  • Publication number: 20240113703
    Abstract: An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a diode and a driving unit. The positive and negative input terminals of the comparator are electrically connected to the input and output voltages. The first resistor, the second resistor, the first capacitor, and the third resistor are electrically connected in series between a reference voltage and a ground terminal sequentially. The reference voltage is lower than a voltage at the positive input terminal. When the input voltage is lower than the output voltage, if a voltage across the ORing FET is larger than a threshold, the comparator outputs a driving signal at low level, and correspondingly the driving unit turns off the ORing FET. The threshold depends on resistances of the first and second resistors.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 4, 2024
    Inventors: Yung-Sheng Yeh, Chih-Wei Liang
  • Publication number: 20240113617
    Abstract: A totem-pole PFC circuit and a control method thereof are provided. The circuit includes an AC power source, first and second bridge arms and a controller. The first bridge arm includes first and second switches electrically connected in series with a connection node electrically connected to a first terminal of the AC power source. The second bridge arm includes third and fourth switches electrically connected in series with a connection node electrically connected to a second terminal of the AC power source. When a potential at the first terminal is higher than a potential at the second terminal, the controller turns off the fourth switch if the L-phase voltage is lower than a first threshold voltage. When the potential at the first terminal is lower than the potential at the second terminal, the controller turns off the third switch if the L-phase voltage is higher than a second threshold voltage.
    Type: Application
    Filed: September 22, 2023
    Publication date: April 4, 2024
    Inventors: Yung-Sheng Yeh, Chih-Wei Liang
  • Publication number: 20240094501
    Abstract: An optical system includes a sensing assembly and a processing circuit. The sensing assembly is configured to sense light and output a sensing signal accordingly. The processing circuit is configured to analyze the sensing signal. The processing circuit is configured to output a main judgment signal to an external circuit according to the sensing signal.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 21, 2024
    Inventors: Chih-Wei WENG, Yung-Hsien YEH
  • Publication number: 20240088213
    Abstract: A semiconductor device includes a drift region, a dielectric film, and an anti-type doping layer. The drift region has a first type conductivity. The anti-type doping layer is located between the drift region and the dielectric film, and has a second type conductivity opposite to the first type conductivity so as to change a current path of a current in the drift region, to thereby prevent the current from being influenced by the dielectric film. A method for manufacturing a semiconductor device and a method for reducing an influence of a dielectric film are also disclosed.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Fu LIN, Tsung-Hao YEH, Chih-Wei HUNG
  • Publication number: 20230204423
    Abstract: Systems, apparatuses, and methods for multi-application optical sensing are provided. For example, an optical sensing apparatus can include a photodetector array, a first circuitry, and a second circuitry. The photodetector array includes a plurality of photodetectors, wherein a first subset of the plurality of photodetectors are configured as a first region for detecting a first optical signal, and a second subset of the plurality of photodetectors are configured as a second region for detecting a second optical signal. The first circuitry, coupled to the first region, is configured to perform a first function based on the first optical signal to output a first output result. The second circuitry, coupled to the second region, is configured to perform a second function based on the second optical signal to output a second output result.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Inventors: Chih-Wei Yeh, Hung-Chih Chang, Yun-Chung Na, Tsung-Ting Wu, Shu-Lu Chen
  • Patent number: 11624653
    Abstract: Systems, apparatuses, and methods for multi-application optical sensing are provided. For example, an optical sensing apparatus can include a photodetector array, a first circuitry, and a second circuitry. The photodetector array includes a plurality of photodetectors, wherein a first subset of the plurality of photodetectors are configured as a first region for detecting a first optical signal, and a second subset of the plurality of photodetectors are configured as a second region for detecting a second optical signal. The first circuitry, coupled to the first region, is configured to perform a first function based on the first optical signal to output a first output result. The second circuitry, coupled to the second region, is configured to perform a second function based on the second optical signal to output a second output result.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 11, 2023
    Assignee: ARTILUX, INC.
    Inventors: Chih-Wei Yeh, Hung-Chih Chang, Yun-Chung Na, Tsung-Ting Wu, Shu-Lu Chen
  • Patent number: 11588373
    Abstract: A kinetic energy recovery system with flywheel includes a cascade flywheel doubly-fed electric machine and an electric motor. The cascade flywheel doubly-fed electric machine has a stator end coil, a rotor end coil and a flywheel. The flywheel can store kinetic energy by increasing speed or releasing kinetic energy by decreasing speed. A control circuit has an inverter, a rectifier and a DC bus connecting the inverter and the rectifier. The inverter supplies alternating current to the rotor end coil. The rectifier has an AC end connected to the stator end coil through an AC bus. The rectifier converts alternating current to direct current, so that the inverter can draw power from the DC bus. The electric motor has a phase coil connected to the AC bus. When the cascade flywheel double-fed electric machine decelerates, the system converts mechanical energy into electrical energy.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: February 21, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Tsan Peng, Chia-Lin Wu, Huan-Lung Gu, Chih-Wei Yeh
  • Publication number: 20220349746
    Abstract: An optical detector module can be used to implement proximity sensing function by detecting ambient light outside of the optical detector module in accordance with a first detection threshold. An optical detector module can be further used to implement other active functions such as material detection (e.g., skin) or depth-sensing by emitting one or more optical signals (e.g., light pulses at a specific wavelength) and detecting the reflected optical signals relative to a second and/or third detection threshold. The disclosure provides technical solutions for actively monitoring detection threshold(s) of an optical detector module to achieve better power management. In some embodiments, such solutions are useful for photodetectors having a wide sensing bandwidth, such as a photodetector formed in germanium or a photodetector comprising an absorption region comprising germanium.
    Type: Application
    Filed: April 27, 2022
    Publication date: November 3, 2022
    Inventors: Kai-Wei Chiu, Chih-Wei Chen, Chih-Wei Yeh