Patents by Inventor Chih-Yang Kao

Chih-Yang Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990537
    Abstract: A heterojunction bipolar transistor includes: a substrate; a base mesa disposed on the substrate, wherein the base mesa includes a collector layer and a base layer disposed on the collector layer, and wherein in a top view, the base layer includes a first edge and a second edge opposite to the first edge; an emitter layer disposed on the base layer; a base electrode disposed on the substrate and connected to the base layer; a dielectric layer disposed on the base electrode, wherein a first via hole is formed in the dielectric layer at the first edge of the base layer, and a second via hole is formed in the dielectric layer at the second edge of the base layer; and a conductive feature disposed on the dielectric layer, wherein the conductive feature is connected to the base electrode through the first via hole and the second via hole.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: May 21, 2024
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Chih-Yang Kao, Chien-Rong Yu
  • Patent number: 11983479
    Abstract: A method of fabricating an integrated circuit includes placing a first set of conductive feature patterns on a first level, placing a second set of conductive feature patterns on a second level, placing a first set of via patterns between the second set of conductive feature patterns and the first set of conductive feature patterns, placing a third set of conductive feature patterns on a third level different from the first level and the second level, placing a second set of via patterns between the third set of conductive feature patterns and the second set of conductive feature patterns, and manufacturing the integrated circuit based on at least one of the above patterns of the integrated circuit.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jung-Chan Yang, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Li-Chun Tien, Meng-Hung Shen, Shang-Chih Hsieh, Chi-Yu Lu
  • Patent number: 11964189
    Abstract: A training device includes a force receiving component, a location detector, a resistance generator, and a controller. The force receiving component moves along a closed trajectory. The location detector is configured to detect a location of the force receiving component in the closed trajectory and to output a location signal. The resistance generator is configured to exert a resistance on the force receiving component. The controller controls the resistance generator to adjust the resistance based on the location signal.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: April 23, 2024
    Assignee: WISTRON CORPORATION
    Inventors: Chuan-Yen Kao, Yao-Tsung Chang, Chih-Yang Hung
  • Patent number: 11923405
    Abstract: The present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate, an insulating layer disposed on the substrate, a first conductive feature disposed in the insulating layer, and a capacitor structure disposed on the insulating layer. The capacitor structure includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode sequentially stacked. The semiconductor device also includes a first via connected to the first electrode and the third electrode, a second via connected to the second electrode, and a third via connected to the first conductive feature. A part of the first via is disposed in the insulating layer. A portion of the first conductive feature is directly under the capacitor structure.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20220416062
    Abstract: A heterojunction bipolar transistor includes: a substrate; a base mesa disposed on the substrate, wherein the base mesa includes a collector layer and a base layer disposed on the collector layer, and wherein in a top view, the base layer includes a first edge and a second edge opposite to the first edge; an emitter layer disposed on the base layer; a base electrode disposed on the substrate and connected to the base layer; a dielectric layer disposed on the base electrode, wherein a first via hole is formed in the dielectric layer at the first edge of the base layer, and a second via hole is formed in the dielectric layer at the second edge of the base layer; and a conductive feature disposed on the dielectric layer, wherein the conductive feature is connected to the base electrode through the first via hole and the second via hole.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 29, 2022
    Inventors: Chih-Yang KAO, Chien-Rong YU
  • Patent number: 8179985
    Abstract: A method for transmitting signals using orthogonal frequency division multiplexing (OFDM) symbols in a wireless communication system, includes: selecting a plurality of OFDM symbols as a symbol group in time dimension; and multiplying a scrambling pattern with the symbol group.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: May 15, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Yang Kao, Ming-Chien Tseng, Ching-Yung Chen
  • Patent number: 7653151
    Abstract: A structure and method for demodulating two-level differential amplitude-shift-keying signals using simple adding operations are provided. Threshold values are dynamically adjusted according to the channel response. By comparing the threshold values and the differential amplitude values, it can be found whether the amplitude of the received signal is changed. Furthermore, it no needs to know the changed value of received signal amplitudes and the differential two-level amplitude-shift-keying signals can be demodulated by just detecting whether the amplitude of the received signal is changed. By this idea, the complexity of the receiver implementation is simplified and the demodulator can get better performance.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: January 26, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Yang Kao, Ching-Yung Chen, Yung-Hua Hung
  • Publication number: 20080181319
    Abstract: A method for transmitting signals using orthogonal frequency division multiplexing (OFDM) symbols in a wireless communication system, includes: selecting a plurality of OFDM symbols as a symbol group in time dimension; and multiplying a scrambling pattern with the symbol group.
    Type: Application
    Filed: July 25, 2007
    Publication date: July 31, 2008
    Inventors: Chih-Yang Kao, Ming-Chien Tseng, Ching-Yung Chen
  • Publication number: 20070076820
    Abstract: A structure and method for demodulating two-level differential amplitude-shift-keying signals using simple adding operations are provided. Threshold values are dynamically adjusted according to the channel response. By comparing the threshold values and the differential amplitude values, it can be found whether the amplitude of the received signal is changed. Furthermore, it no needs to know the changed value of received signal amplitudes and the differential two-level amplitude-shift-keying signals can be demodulated by just detecting whether the amplitude of the received signal is changed. By this idea, the complexity of the receiver implementation is simplified and the demodulator can get better performance.
    Type: Application
    Filed: December 28, 2005
    Publication date: April 5, 2007
    Inventors: Chih-Yang Kao, Ching-Yung Chen, Yung-Hua Hung
  • Patent number: D430870
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: September 12, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yukinobu Maruyama, Masayuki Kan, Ernesto V. Quinteros, Chih-Yang Kao