Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A fan brake structure includes a fan and a brake device. The fan has a frame body, a fan impeller and a stator. The brake device is disposed under a bottom of a bearing cup. The brake device has a driving member, a brake member and an elastic member. The elastic member abuts against one end of the brake member. The other end of the brake member has a boss body. The driving member has a spiral rail. When the driving member rotates, the boss body moves along the spiral rail, whereby the brake member linearly reciprocally moves upward to brake the fan impeller or linearly reciprocally moves downward to release the fan impeller from the braking.

Abstract: A recycle apparatus includes a conveyor, a flattening device, and a cutting tool. The conveyor includes a first roller and a second roller opposite to each other. The flattening device is located aside the first roller and the second roller. The cutting tool is located aside the flattening device. The flattening device is located between the first roller and the second roller of the conveyor and the cutting tool. The first roller and the second roller is configured to press and feed the photovoltaic module to the flattening device for allowing the photovoltaic module to be flattened by the flattening device, and then the flattened photovoltaic module is fed to the cutting tool by the first roller and the second roller for allowing the back sheet to be separated from the glass sheet assembly by the cutting tool.

Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.

Abstract: A system including a processor configured to perform generating a plurality of different layout blocks; selecting, among the plurality of layout blocks, layout blocks corresponding to a plurality of blocks in a floorplan of a circuit; combining the selected layout blocks in accordance with the floorplan into a layout of the circuit; and storing the layout of the circuit in a cell library or using the layout of the circuit to generate a layout for an integrated circuit (IC) containing the circuit. Each of the plurality of layout blocks satisfies predetermined design rules and includes at least one of a plurality of different first block options associated with a first layout feature, and at least one of a plurality of different second block options associated with a second layout feature different from the first layout feature.

Abstract: A memory device and a method for operating the memory device are provided. The memory device includes a memory cell and a bit line connected to the memory cell. A negative voltage generator is connected to the bit line. The negative voltage generator, when enabled, is operative to provide a first write path for the bit line. A control circuit is connected to the negative voltage generator and the bit line. The control circuit is operative to provide a second write path for the bit line when the negative voltage generator is not enabled.

Abstract: A method of decoding a bitstream by an electronic device is provided. The method determines a block unit from an image frame received from the bitstream. To reconstruct the block unit, the method receives, from a candidate list, first motion information having a first list flag for selecting a first reference frame and second motion information having a second list flag for selecting a second reference frame. The method then stores a predefined one of the first and second motion information for a sub-block determined in the block unit when the first list flag is identical to the second list flag.

Abstract: Methods of amplifying and determining a target nucleotide sequence are provided. The method of amplifying the target nucleotide sequence includes the following steps. A first adaptor and a second adaptor are linked to two ends of a double-stranded nucleic acid molecule with a target nucleotide sequence respectively to form a nucleic acid template, in which the first adaptor includes a Y-form adaptor or a hairpin adaptor and the second adaptor is a hairpin adaptor. Then, a PCR amplification cycle is performed on the nucleic acid template to obtain a PCR amplicon of the target nucleotide sequence.

Abstract: A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.

Abstract: An antimicrobial electrochemical fabric and a method for manufacturing the same are provided. The method for manufacturing the antimicrobial electrochemical fabric includes the following steps: providing an electro-spinning polymer solution, in which the electro-spinning polymer solution includes a polymer and a plurality of antimicrobial metal precursors; electro-spinning the electro-spinning polymer solution into a polymer fiber for formation of a sheet structure, in which the plurality of antimicrobial metal precursors are distributed on the polymer fiber; and reducing the plurality of antimicrobial metal precursors into a plurality of antimicrobial metal particles, so as to form the sheet structure into the antimicrobial electrochemical fabric.

Abstract: A memory array is disclosed. The memory array includes a plurality of memory cells disposed over a substrate. Each of the memory cells is coupled to a corresponding one of a plurality of word lines and a corresponding one of a plurality of bit line pairs. First four of the memory cells that are coupled to four consecutive ones of the word lines and to a first one of the bit line pairs are abutted to one another on the substrate along a single lateral direction.

Abstract: The present application provides a transmission structure of an antenna and a proximity sensing circuit. The transmission structure includes a transmission line and at least one radio-frequency short-circuit element, a first coupling end of the transmission line is coupled to an antenna, and a second coupling end of the transmission line is coupled to a proximity sensing circuit, and the at least one radio-frequency short-circuit element is coupled between the transmission line and a ground, and is located between the antenna and the proximity sensing circuit. Utilizing the at least one radio-frequency short-circuit element in conjunction with the transmission line so that the transmission path between the antenna and the proximity sensing circuit has the high impedance, and hence preventing a radio-frequency signal from the antenna from affecting the sensing accuracy of the proximity sensing circuit.

Abstract: A memory cell includes a write port and a read port. The write port includes two cross-coupled inverters that form a storage unit. The cross-coupled inverters are connected between a first power source signal line and a second power source signal line. The write port also includes a first local interconnect line in an interconnect layer that is connected to the second power source signal line. The read port includes a transistor that is connected to the storage unit in the write port and to the second power source signal line, and a second local interconnect line in the interconnect layer that is connected to the second power source signal line. The second local interconnect line in the read port is separate from the first local interconnect line in the write port.

Abstract: A device includes first and second gate electrodes, a word line and a first metal island. The first gate electrode corresponds to transistors of a memory cell. The second gate electrode is separated from the first gate electrode and corresponds to the transistors. The word line is coupled to the memory cell and located between the first and the second gate electrodes. The first metal island is configured to couple a first power supply to the memory cell. A first boundary of the first metal island is located between first and second boundaries of the first gate electrode and is located between first and second boundaries of the word line, and each of the first boundary of the first gate electrode and the first boundary of the word line is located between first and second boundaries of the first metal island.

Abstract: A memory device includes a first bit cell, a second bit cell, a first word line and a second word line. A first boundary of the second bit cell is adjacent with a first boundary of the first bit cell. The first word line is coupled to the first bit cell. The second word line is coupled to the second bit cell. A first segment of the first word line is overlapped with the first boundary of the second bit cell in a plan view, and a first segment of the second word line is overlapped with a second boundary of the second bit cell in the plan view.

Abstract: A memory device is disclosed. The memory device includes a first program line and a second program line. A first portion of the first program line is formed in a first conductive layer, and a second portion of the first program line is formed in a second conductive layer above the first conductive layer. A first portion of the second program line is formed in the first conductive layer, and a second portion of the second program line is formed in a third conductive layer above the second conductive layer. A width of at least one of the second portion of the first program line or the second portion of the second program line is different from a width of at least one of the first portion of the first program line or the first portion of the second program line. A method is also disclosed herein.

Abstract: A static random access memory includes a first and second memory cell array, a first word line, a bit line, a bit line bar, a primary driver circuit, and a first and second supplementary driver circuit. The first supplementary driver circuit is configured to pull a voltage of a first signal of the bit line or a second signal of the bit line bar to a first voltage level during a write operation in response to a supplementary driver circuit enable signal. The second supplementary driver circuit is configured to sense the voltage of the first or second signal. The second supplementary driver circuit includes a first pass-gate transistor. A first terminal of the first pass-gate transistor is coupled to a reference voltage supply. A second terminal of the first pass-gate transistor is electrically floating. A third terminal of the first pass-gate transistor is coupled to a first node.

Abstract: A proximity sensor and a proximity sensing method are disclosed. The proximity sensor includes a sensing element and a sensing circuit. The sensing circuit is coupled to the sensing element and transmits a first driving signal and a second signal to the sensing element, respectively. The sensing element receives the first driving signal and the second driving signal, respectively, and generates a first sensing signal and a second sensing signal, respectively. The sensing circuit generates a proximity signal according to the first sensing signal and the second sensing signal. The accuracy of sensing the proximity of the human body whether near to the sensor is improved. In addition, the sensing circuit is further coupled to a radio-frequency circuit, and the sensing circuit transmits a driving signal or/and receives a sensing signal according to the state of the radio-frequency circuit, thereby reducing interference of the sensing circuit to the radio-frequency circuit.

Abstract: A device is disclosed that includes a fin structure disposed below a first metal layer, extending along a column direction, and corresponding to at least one transistor of a memory bit cell, a word line disposed in the first metal layer and extending along a row direction, a first metal island disposed in the first metal layer separated from the word line, and a first connection metal line disposed in a second metal layer above the first metal layer, extending along the column direction, and configured to couple a power supply through the first metal island to the fin structure. In a layout view, the first connection metal line is separated from the fin structure, and the fin structure crosses over the word line and the first metal island. A method is also disclosed herein.