Patents by Inventor Chih-Yuan Chan
Chih-Yuan Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11982866Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.Type: GrantFiled: December 15, 2022Date of Patent: May 14, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
-
Patent number: 11976358Abstract: An atomic layer deposition system is provided, including: a main body, a platform, a gas distribution showerhead assembly and a first ring member. The main body defines a reaction chamber, and the platform is located in the reaction chamber. The gas distribution showerhead assembly is disposed on the main body and includes at least one gas inlet channel and at least one gas diffusion plate. Each of the at least one gas diffusion plate includes a plurality of through holes. The first ring member defines a radial direction and is disposed between the platform and the at least one gas diffusion plate. A region of the at least one gas diffusion plate distributed with the plurality of through holes defines an outermost distribution profile. An inner circumferential wall of the first ring member and the outermost distribution profile keep a distance in the radial direction.Type: GrantFiled: February 28, 2022Date of Patent: May 7, 2024Assignee: SYSKEY TECHNOLOGY CO., LTD.Inventors: Hsueh-Hsien Wu, Chih-Yuan Chan, Yi-Ting Lai
-
Patent number: 11817333Abstract: A miniaturized semiconductor manufacturing system including: a housing, a lifting mechanism, a processing chamber and a transportation mechanism. The housing includes an inner space and an opening communicated with the inner space. The lifting mechanism is disposed in the inner space and includes a holder configured for a substrate to be placed thereon. The holder is movable in a first direction relative to the opening between a first position and a second position. The processing chamber is disposed in the inner space and includes a holding portion configured for the substrate to be placed thereon. The transportation mechanism is disposed between the lifting mechanism and the processing chamber and is movable in a second direction. Wherein an aspect ratio value of the housing is between 1 to 6.Type: GrantFiled: March 17, 2021Date of Patent: November 14, 2023Assignee: SYSKEY TECHNOLOGY CO., LTD.Inventors: Hsueh-Hsien Wu, Chih-Yuan Chan
-
Publication number: 20230272528Abstract: An atomic layer deposition system is provided, including: a main body, a platform, a gas distribution showerhead assembly and a first ring member. The main body defines a reaction chamber, and the platform is located in the reaction chamber. The gas distribution showerhead assembly is disposed on the main body and includes at least one gas inlet channel and at least one gas diffusion plate. Each of the at least one gas diffusion plate includes a plurality of through holes. The first ring member defines a radial direction and is disposed between the platform and the at least one gas diffusion plate. A region of the at least one gas diffusion plate distributed with the plurality of through holes defines an outermost distribution profile. An inner circumferential wall of the first ring member and the outermost distribution profile keep a distance in the radial direction.Type: ApplicationFiled: February 28, 2022Publication date: August 31, 2023Inventors: HSUEH-HSIEN WU, CHIH-YUAN CHAN, YI-TING LAI
-
Publication number: 20230274958Abstract: A multi-chamber semiconductor manufacturing system is provided, including: a base, a plurality of processing units and a transfer unit. The base includes a main body and a plurality of supporting frames protrudingly disposed on a mounting surface of the main body. The plurality of processing units are connected to the plurality of supporting frames. The transfer unit is connected to the plurality of supporting frames and located between the plurality of processing units. The transfer unit is configured to transfer a substrate between the plurality of processing units. An aspect ratio value of the base is between 1 and 3.Type: ApplicationFiled: February 28, 2022Publication date: August 31, 2023Inventors: HSUEH-HSIEN WU, CHIH-YUAN CHAN, YI-TING LAI
-
Publication number: 20220336659Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: ApplicationFiled: June 29, 2022Publication date: October 20, 2022Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
-
Patent number: 11424359Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: GrantFiled: January 6, 2021Date of Patent: August 23, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
-
Publication number: 20220254665Abstract: A miniaturized semiconductor manufacturing system including: a housing, a lifting mechanism, a processing chamber and a transportation mechanism. The housing includes an inner space and an opening communicated with the inner space. The lifting mechanism is disposed in the inner space and includes a holder configured for a substrate to be placed thereon. The holder is movable in a first direction relative to the opening between a first position and a second position. The processing chamber is disposed in the inner space and includes a holding portion configured for the substrate to be placed thereon. The transportation mechanism is disposed between the lifting mechanism and the processing chamber and is movable in a second direction. Wherein an aspect ratio value of the housing is between 1 to 6.Type: ApplicationFiled: March 17, 2021Publication date: August 11, 2022Inventors: HSUEH-HSIEN WU, CHIH-YUAN CHAN
-
Patent number: 11410991Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes a ring-shaped drain region having an inner edge and an outer edge. A channel region surrounds the ring-shaped drain region. A source region surrounds the channel region. The channel region separates the drain region from the source region. A gate electrode is arranged over the channel region and is separated from the channel region by a gate dielectric. An inner edge of the gate electrode is proximate to the drain region. A resistor structure is arranged over and spaced apart from an upper surface of the substrate. The resistor structure has a first end and a second end which are connected by a curved or polygonal path of resistive material. The first end is coupled to the ring-shaped drain. The resistor has an outer perimeter that is surrounded by the inner edge of the ring-shaped drain region.Type: GrantFiled: January 22, 2021Date of Patent: August 9, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
-
Patent number: 11114543Abstract: A group III-V device structure is provided. The group III-V device structure includes a channel layer formed over a substrate and an active layer formed over the channel layer. The group III-V device structure also includes a gate structure formed over the active layer and a source electrode and a drain electrode formed over the active layer. The source electrode and the drain electrode are formed on opposite sides of the gate structure. The group III-V device structure further includes a through via structure formed through the channel layer, the active layer and a portion of the substrate, and the through via structure is electrically connected to the source electrode or the drain electrode.Type: GrantFiled: March 16, 2017Date of Patent: September 7, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ming-Hong Chang, Chih-Yuan Chan, Shen-Ping Wang, Chung-Cheng Chen, Chien-Li Kuo, Po-Tao Chu
-
Publication number: 20210175227Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes a ring-shaped drain region having an inner edge and an outer edge. A channel region surrounds the ring-shaped drain region. A source region surrounds the channel region. The channel region separates the drain region from the source region. A gate electrode is arranged over the channel region and is separated from the channel region by a gate dielectric. An inner edge of the gate electrode is proximate to the drain region. A resistor structure is arranged over and spaced apart from an upper surface of the substrate. The resistor structure has a first end and a second end which are connected by a curved or polygonal path of resistive material. The first end is coupled to the ring-shaped drain. The resistor has an outer perimeter that is surrounded by the inner edge of the ring-shaped drain region.Type: ApplicationFiled: January 22, 2021Publication date: June 10, 2021Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
-
Publication number: 20210159334Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: ApplicationFiled: January 6, 2021Publication date: May 27, 2021Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun Lin Tsai
-
Patent number: 10923467Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes a ring-shaped drain region having an inner edge and an outer edge. A channel region surrounds the ring-shaped drain region. A source region surrounds the channel region. The channel region separates the drain region from the source region. A gate electrode is arranged over the channel region and is separated from the channel region by a gate dielectric. An inner edge of the gate electrode is proximate to the drain region. A resistor structure is arranged over and spaced apart from an upper surface of the substrate. The resistor structure has a first end and a second end which are connected by a curved or polygonal path of resistive material. The first end is coupled to the ring-shaped drain. The resistor has an outer perimeter that is surrounded by the inner edge of the ring-shaped drain region.Type: GrantFiled: September 26, 2019Date of Patent: February 16, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
-
Patent number: 10892360Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: GrantFiled: October 29, 2018Date of Patent: January 12, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
-
Patent number: 10867990Abstract: Some embodiments relate to a method. In the method, a semiconductor substrate is provided. Dopant impurities of a first dopant conductivity are implanted into the semiconductor substrate to form a body region. A gate dielectric and a field oxide region are formed over the semiconductor substrate. A polysilicon layer is formed over the gate dielectric and field oxide region. The polysilicon layer is patterned to concurrently form a conductive gate electrode over the gate dielectric and a resistor structure over the field oxide region. The resistor structure is perimeterally bounded by an inner edge of the conductive gate electrode. Dopant impurities of a second dopant conductivity, which is opposite the first dopant conductivity, are implanted into the semiconductor substrate to form a source region and a drain region. The drain region is perimeterally bounded by the inner edge of the conductive gate electrode.Type: GrantFiled: September 26, 2019Date of Patent: December 15, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
-
Publication number: 20200043912Abstract: Some embodiments relate to a method. In the method, a semiconductor substrate is provided. Dopant impurities of a first dopant conductivity are implanted into the semiconductor substrate to form a body region. A gate dielectric and a field oxide region are formed over the semiconductor substrate. A polysilicon layer is formed over the gate dielectric and field oxide region. The polysilicon layer is patterned to concurrently form a conductive gate electrode over the gate dielectric and a resistor structure over the field oxide region. The resistor structure is perimeterally bounded by an inner edge of the conductive gate electrode. Dopant impurities of a second dopant conductivity, which is opposite the first dopant conductivity, are implanted into the semiconductor substrate to form a source region and a drain region. The drain region is perimeterally bounded by the inner edge of the conductive gate electrode.Type: ApplicationFiled: September 26, 2019Publication date: February 6, 2020Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
-
Publication number: 20200027874Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes a ring-shaped drain region having an inner edge and an outer edge. A channel region surrounds the ring-shaped drain region. A source region surrounds the channel region. The channel region separates the drain region from the source region. A gate electrode is arranged over the channel region and is separated from the channel region by a gate dielectric. An inner edge of the gate electrode is proximate to the drain region. A resistor structure is arranged over and spaced apart from an upper surface of the substrate. The resistor structure has a first end and a second end which are connected by a curved or polygonal path of resistive material. The first end is coupled to the ring-shaped drain. The resistor has an outer perimeter that is surrounded by the inner edge of the ring-shaped drain region.Type: ApplicationFiled: September 26, 2019Publication date: January 23, 2020Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
-
Patent number: 10483259Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes a ring-shaped drain region having an inner edge and an outer edge. A channel region surrounds the ring-shaped drain region. A source region surrounds the channel region. The channel region separates the drain region from the source region. A gate electrode is arranged over the channel region and is separated from the channel region by a gate dielectric. An inner edge of the gate electrode is proximate to the drain region. A resistor structure is arranged over and spaced apart from an upper surface of the substrate. The resistor structure has a first end and a second end which are connected by a curved or polygonal path of resistive material. The first end is coupled to the ring-shaped drain. The resistor has an outer perimeter that is surrounded by the inner edge of the ring-shaped drain region.Type: GrantFiled: April 2, 2018Date of Patent: November 19, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
-
Publication number: 20190165167Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: ApplicationFiled: October 29, 2018Publication date: May 30, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hung-Chou LIN, Yi-Cheng CHIU, Karthick MURUKESAN, Yi-Min CHEN, Shiuan-Jeng LIN, Wen-Chih CHIANG, Chen-Chien CHANG, Chih-Yuan CHAN, Kuo-Ming WU, Chun-Lin TSAI
-
Patent number: D990538Type: GrantFiled: February 5, 2021Date of Patent: June 27, 2023Assignee: Syskey Technology Co., Ltd.Inventors: Hsueh-Hsien Wu, Chih-Yuan Chan