Patents by Inventor Chihiro Migita

Chihiro Migita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9653416
    Abstract: A method of manufacturing a semiconductor substrate includes a device-forming process of forming a plurality of device areas in a substrate section, a first wiring process of forming circuit wirings connected to the plurality of device areas, an electrode pad-forming process of forming a plurality of electrode pads, a second wiring process of forming a potential adjustment wiring electrically connecting at least a part of the electrode pads, an electrode-forming process of forming electrode bodies on the electrode pads by electroless plating after the second wiring process, and a potential adjustment-releasing process of releasing a connection by the potential adjustment wiring after the electrode-forming process.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: May 16, 2017
    Assignee: OLYMPUS CORPORATION
    Inventors: Chihiro Migita, Hisashi Ishida, Yoshiaki Takemoto
  • Patent number: 9425135
    Abstract: An electrode body is provided as an electrode body capable of appropriately reducing a load when silicon wafer direct bonding is performed. The electrode body 1 includes a base member 10 that has a predetermined thickness; and an electrode portion 20 that is formed on one surface of the base member in a thickness direction thereof. The electrode portion 20 includes a basic bump 21 formed in a substantially columnar shape to protrude on the base member 10 and a fragile bump 22 formed independently from the basic bump to form a metallic bond with the basic bump 21.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: August 23, 2016
    Assignee: OLYMPUS CORPORATION
    Inventors: Chihiro Migita, Hiroshi Kikuchi, Yoshiaki Takemoto
  • Publication number: 20160163664
    Abstract: A method of manufacturing a semiconductor substrate includes a device-forming process of forming a plurality of device areas in a substrate section, a first wiring process of forming circuit wirings connected to the plurality of device areas, an electrode pad-forming process of forming a plurality of electrode pads, a second wiring process of forming a potential adjustment wiring electrically connecting at least a part of the electrode pads, an electrode-forming process of forming electrode bodies on the electrode pads by electroless plating after the second wiring process, and a potential adjustment-releasing process of releasing a connection by the potential adjustment wiring after the electrode-forming process.
    Type: Application
    Filed: February 16, 2016
    Publication date: June 9, 2016
    Applicant: OLYMPUS CORPORATION
    Inventors: Chihiro Migita, Hisashi Ishida, Yoshiaki Takemoto
  • Publication number: 20150357300
    Abstract: A semiconductor substrate includes a semiconductor substrate body in which a wiring is formed and a bonding electrode provided to protrude from a first surface of the semiconductor substrate body. The bonding electrode comprises a composite including a first metal portion which is provided to protrude from the first surface of the semiconductor substrate body and of which a base end portion in a protrusion direction is electrically connected to the wiring, and a second metal portion which is formed of a second metal which has lower hardness than first metal of which the first metal portion is formed and which is provided to be bonded to the first metal portion in a range equal to or less than a protrusion height of the first metal portion, the first metal portion is formed on the second metal portion by sputtering or evaporation the first metal.
    Type: Application
    Filed: August 11, 2015
    Publication date: December 10, 2015
    Applicant: OLYMPUS CORPORATION
    Inventors: Haruhisa Saito, Yoshitaka Tadaki, Chihiro Migita
  • Publication number: 20150311146
    Abstract: A wiring substrate may include: a base having a predetermined thickness; a plurality of electrode portions formed to protrude on one surface in a thickness direction of the base; a wiring provided in the base and electrically connected to the electrode portions; and a resin layer formed on the base to fill between the plurality of electrode portions. An upper surface of the resin layer may be formed in a concave shape lower than a maximum height of the electrode portion, and an upper surface of the electrode portion and the upper surface of the resin layer form a continuous curved surface.
    Type: Application
    Filed: July 9, 2015
    Publication date: October 29, 2015
    Applicant: OLYMPUS CORPORATION
    Inventors: Chihiro Migita, Hiroshi Kikuchi, Yoshiaki Takemoto, Yoshitaka Tadaki
  • Patent number: 9111923
    Abstract: A wiring substrate may include: a base having a predetermined thickness; a plurality of electrode portions formed to protrude on one surface in a thickness direction of the base; a wiring provided in the base and electrically connected to the electrode portions; and a resin layer formed on the base to fill between the plurality of electrode portions. An upper surface of the resin layer may be formed in a concave shape lower than a maximum height of the electrode portion, and an upper surface of the electrode portion and the upper surface of the resin layer form a continuous curved surface.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 18, 2015
    Assignee: OLYMPUS CORPORATION
    Inventors: Chihiro Migita, Hiroshi Kikuchi, Yoshiaki Takemoto, Yoshitaka Tadaki
  • Patent number: 9035470
    Abstract: A substrate includes a base member having a predetermined thickness, and an electrode array provided in one surface in a thickness direction of the base member and having a plurality of electrodes arranged two-dimensionally in a plan view, and the electrode array includes a central portion and an incremental region provided around the central portion in the planar view and is formed so that a height of the electrodes in the incremental region gradually increase as approaching toward the central portion.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: May 19, 2015
    Assignee: OLYMPUS CORPORATION
    Inventors: Yoshiaki Takemoto, Yuichi Gomi, Chihiro Migita, Hiroshi Kikuchi
  • Publication number: 20130256879
    Abstract: A wiring substrate may include: a base having a predetermined thickness; a plurality of electrode portions formed to protrude on one surface in a thickness direction of the base; a wiring provided in the base and electrically connected to the electrode portions; and a resin layer formed on the base to fill between the plurality of electrode portions. An upper surface of the resin layer may be formed in a concave shape lower than a maximum height of the electrode portion, and an upper surface of the electrode portion and the upper surface of the resin layer form a continuous curved surface.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 3, 2013
    Applicant: OLYMPUS CORPORATION
    Inventors: Chihiro Migita, Hiroshi Kikuchi, Yoshiaki Takemoto, Yoshitaka Tadaki
  • Publication number: 20130256880
    Abstract: An electrode body is provided as an electrode body capable of appropriately reducing a load when silicon wafer direct bonding is performed. The electrode body includes a base member that has a predetermined thickness; and an electrode portion that is formed on one surface of the base member in a thickness direction thereof. The electrode portion includes a basic bump formed in a substantially columnar shape to protrude on the base member and a fragile bump formed independently from the basic bump to form a metallic bond with the basic bump.
    Type: Application
    Filed: March 27, 2013
    Publication date: October 3, 2013
    Applicant: OLYMPUS CORPORATION
    Inventors: Chihiro Migita, Hiroshi Kikuchi, Yoshiaki Takemoto
  • Publication number: 20130256889
    Abstract: A substrate includes a base member having a predetermined thickness, and an electrode array provided in one surface in a thickness direction of the base member and having a plurality of electrodes arranged two-dimensionally in a plan view, and the electrode array includes a central portion and an incremental region provided around the central portion in the planar view and is formed so that a height of the electrodes in the incremental region gradually increase as approaching toward the central portion.
    Type: Application
    Filed: March 18, 2013
    Publication date: October 3, 2013
    Applicant: OLYMPUS CORPORATION
    Inventors: Yoshiaki Takemoto, Yuichi Gomi, Chihiro Migita, Hiroshi Kikuchi