Abstract: An Integrated Circuit (IC) package has a ferrite-dielectric shield between planar transformer coils and a semiconductor chip. The shield blocks Electro-Magnetic Interference (EMI) generated by currents in transformer coils from reaching the semiconductor chip. Multiple layers of planar transformer coils serve as primary or secondary coils and can be connected together in series or parallel using center posts and coil extensions from outer coil windings to lead-frame risers that also have external package connectors such as pins or bonding balls. The center winding of an upper transformer coil connects to the semiconductor chip on a die attach pad through a center post that fits through an opening in the shield that is over the air core center of the transformer coil. Bonding wires connect pads on the semiconductor chip to lead-frame pads on lead-frame risers that end at external package connectors.

Abstract: An Integrated Circuit (IC) package has a ferrite-dielectric shield between a planar inductor coil and a semiconductor chip. The shield blocks Electro-Magnetic Interference (EMI) generated by currents in the inductor coil from reaching the semiconductor chip. The shield has a ferrite layer surrounded by upper and lower dielectric laminate layers to prevent electrical shorts. The center end of the inductor coil connects to the semiconductor chip through a center post that fits through an opening in the shield that is over the air core center of the inductor coil. The center post can connect to a die attach pad that the semiconductor chip is mounted to. Bonding wires connect pads on the semiconductor chip to lead-frame pads on lead-frame risers that end at external package connectors. The outer end of the inductor coil connects to lead-frame outer risers also having external package connectors such as pins or bonding balls.

Abstract: A re-configurable bank of DC-DC converters has many channels, each with a DC-DC converter and a controller that senses the channel's output voltage and current to adjust a duty cycle of switch signals to the DC-DC converter. A serial bus connects to all controllers and writes digital voltage and current control targets into each controller. The controller has Digital-to-Analog Converters (DACs) that convert the targets to analog voltages that are compared to sensed output voltage and current. The comparison results are compared to a sawtooth wave to generate pulses of the switch signals that have a duty cycle adjusted for the target comparisons. In combined mode, a primary channel's controller generates switch signals for secondary channels having outputs shorted to the primary channel. Secondary channels have a mux to select switch signals from the primary controller during combined mode, and from the secondary controller during separated mode.

Abstract: A modulator spreads the spectrum of a generated clock to reduce Electro-Magnetic Interference (EMI). A capacitor is charged by a variable current to generate a ramp voltage that is compared to a reference to end a clock cycle and discharge the capacitor. An up-down counter drives a Digital-to-Analog Converter (DAC) that controls the variable charging current to provide triangle modulation. A smaller offset current is added or subtracted for cubic modulation when the up-down counter reaches its minimum count. A frequency divider that clocks the up-down counter also clocks a Linear-Feedback Shift-Register (LFSR) to that controls pseudo-random current sources that further modulate variable current and frequency. The LFSR is clocked with the up-down counter to modulate each frequency step, or only at the minimum count to randomly modulate at the minimum frequency. Binary-weighted bits from the up-down counter to the DAC are swapped to modulate the frequency step size.

Abstract: A re-configurable bank of DC-DC converters has many channels, each with a DC-DC converter and a controller that senses the channel's output voltage and current to adjust a duty cycle of switch signals to the DC-DC converter. A serial bus connects to all controllers and writes digital voltage and current control targets into each controller. The controller has Digital-to-Analog Converters (DACs) that convert the targets to analog voltages that are compared to sensed output voltage and current. The comparison results are compared to a sawtooth wave to generate pulses of the switch signals that have a duty cycle adjusted for the target comparisons. In combined mode, a primary channel's controller generates switch signals for secondary channels having outputs shorted to the primary channel. Secondary channels have a mux to select switch signals from the primary controller during combined mode, and from the secondary controller during separated mode.

Abstract: A serial battery charger has a battery matrix with switches that are configured by a microcontroller that reads voltages between batteries to determine if each battery is fully-charged, charging, or absent. A switch configuration allows charging and discharging currents to flow simultaneously, and allows discharging current but blocks charging current from fully-charged batteries to prevent over-charging. The charging current flows through all charging batteries in series while the discharging current flows from all fully-charged and charging batteries in series. Blocking and bypass switches route the charging current to all charging batteries in series, but bypass all fully-charged and absent batteries. The blocking and bypass switches route the discharging current serially through all fully-charged and charging batteries in the battery matrix while avoiding absent batteries. The switches are controlled by the switch configuration from the microcontroller.

Abstract: A power converter reduces output ripple without using an electrolytic primary-side capacitor that can reduce product lifetime. Primary-Side Regulation (PSR) using an auxiliary winding provides a regulated secondary voltage with some low-frequency ripple on a secondary winding of a transformer. A smaller secondary capacitor that is not an electrolytic capacitor filters the output of the secondary side. A bang-bang controller controls the secondary side current to reduce current ripple despite voltage ripple. The bang-bang controller has a series resistor and inductor in series with a load such as an LED. A voltage drop across the series resistor increases when a switch turns on. This increasing voltage drop toggles the switch off once an upper limit voltage is reached. The voltage drop then decreases as inductor current is shunted by a diode, until the voltage drop reaches a lower limit voltage and the switch toggles on again.

Abstract: A serial battery charger has a battery matrix with switches that are configured by a microcontroller that reads voltages between batteries to determine if each battery is fully-charged, charging, or absent. A switch configuration allows charging and discharging currents to flow simultaneously, and allows discharging current but blocks charging current from fully-charged batteries to prevent over-charging. The charging current flows through all charging batteries in series while the discharging current flows from all fully-charged and charging batteries in series. Blocking and bypass switches route the charging current to all charging batteries in series, but bypass all fully-charged and absent batteries. The blocking and bypass switches route the discharging current serially through all fully-charged and charging batteries in the battery matrix while avoiding absent batteries. The switches are controlled by the switch configuration from the microcontroller.

Abstract: A power converter reduces output ripple without using an electrolytic primary-side capacitor that can reduce product lifetime. Primary-Side Regulation (PSR) using an auxiliary winding provides a regulated secondary voltage with some low-frequency ripple on a secondary winding of a transformer. A smaller secondary capacitor that is not an electrolytic capacitor filters the output of the secondary side. A bang-bang controller controls the secondary side current to reduce current ripple despite voltage ripple. The bang-bang controller has a series resistor and inductor in series with a load such as an LED. A voltage drop across the series resistor increases when a switch turns on. This increasing voltage drop toggles the switch off once an upper limit voltage is reached. The voltage drop then decreases as inductor current is shunted by a diode, until the voltage drop reaches a lower limit voltage and the switch toggles on again.

Abstract: A fly-back power converter has a current-estimating control loop that senses the primary output current in a transformer to control the secondary output. A primary-side control circuit switches primary current through the transformer on and off. A discharge time when a secondary current through an auxiliary winding of the transformer is flowing is generated by sampling a voltage divider on an auxiliary loop for a knee-point. A normalized duty cycle is calculated by multiplying the discharge time by a current that is proportional to the switching frequency and comparing to a sawtooth signal having the switching frequency. The peak of a primary-side voltage is sensed from the primary current loop and converted to a current and multiplied by the normalized duty cycle to generate an estimated current. An error amp compares the estimated current to a reference to adjust the oscillator frequency and peak current to control primary switching.

Abstract: A charge/discharge protection circuit protects a battery from inadvertent shorting on a charger node that can connect to a charger or to a power supply of a portable electronic device. A single n-channel power transistor has a gate that controls a channel between the battery and the charger node. The gate is connected to the charger node by a gate-coupling transistor to turn off the power transistor, providing battery isolation. The gate is driven by a voltage-boosted clock through a switch activated by an enable signal. The enable signal also activates a grounding transistor to ground a gate of the gate-coupling transistor. A comparator compares voltages of the charger and battery nodes, and the compare output is latched to generate the enable signal. An inverse enable signal activates a second switch that drives the voltage-boosted clock to the gate of the gate-coupling transistor to turn off the power transistor.

Abstract: A fly-back power converter has a current-estimating control loop that senses the primary output current in a transformer to control the secondary output. A primary-side control circuit switches primary current through the transformer on and off. A discharge time when a secondary current through an auxiliary winding of the transformer is flowing is generated by sampling a voltage divider on an auxiliary loop for a knee-point. A normalized duty cycle is calculated by multiplying the discharge time by a current that is proportional to the switching frequency and comparing to a sawtooth signal having the switching frequency. The peak of a primary-side voltage is sensed from the primary current loop and converted to a current and multiplied by the normalized duty cycle to generate an estimated current. An error amp compares the estimated current to a reference to adjust the oscillator frequency and peak current to control primary switching.

Abstract: A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator. A primary-side control circuit can use either a Quasi-Resonant (QR) or a Pulse-Width-Modulation (PWM) control loop to switch primary current through the transformer on and off. A feedback voltage is compared to a primary-side voltage sensed from the primary current loop to turn the switch on and off. A multiplier loop generates the feedback voltage using a multiplier. A level-shift inverter and a low-pass filter act as the multiplier by multiplying an off duty cycle of the switch by the feedback voltage to generate a filtered voltage. A high-gain error amp compares the filtered voltage to a reference voltage to generate the feedback voltage. The multiplier produces a simple relationship between the secondary current and the reference voltage, yielding simplified current control.

Abstract: A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.

Abstract: A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.

Abstract: An electro-static-discharge (ESD) protection circuit protects core transistors. An internal node to the gate of an n-channel output transistor connects to the drain of an n-channel gate-grounding transistor to ground. The gate of the gate-grounding transistor is a coupled-gate node that is coupled by an ESD coupling capacitor to the output and to ground by an n-channel disabling transistor and a leaker resistor. The gate of the n-channel disabling transistor is connected to power and disables the ESD protection circuit when powered. An ESD pulse applied to the output is coupled through the ESD coupling capacitor to pulse high the coupled-gate node and turn on the gate-grounding transistor to ground the gate of the n-channel output transistor, which breaks down to shunt ESD current. The ESD pulse is prevented from coupling through a parasitic Miller capacitor of the n-channel output transistor by the gate-grounding transistor.

Abstract: A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator. A primary-side control circuit can use either a Quasi-Resonant (QR) or a Pulse-Width-Modulation (PWM) control loop to switch primary current through the transformer on and off. A feedback voltage is compared to a primary-side voltage sensed from the primary current loop to turn the switch on and off. A multiplier loop generates the feedback voltage using a multiplier. A level-shift inverter and a low-pass filter act as the multiplier by multiplying an off duty cycle of the switch by the feedback voltage to generate a filtered voltage. A high-gain error amp compares the filtered voltage to a reference voltage to generate the feedback voltage. The multiplier produces a simple relationship between the secondary current and the reference voltage, yielding simplified current control.

Abstract: A charge/discharge protection circuit protects a battery from inadvertent shorting on a charger node that can connect to a charger or to a power supply of a portable electronic device. A single n-channel power transistor has a gate that controls a channel between the battery and the charger node. The gate is connected to the charger node by a gate-coupling transistor to turn off the power transistor, providing battery isolation. The gate is driven by a voltage-boosted clock through a switch activated by an enable signal. The enable signal also activates a grounding transistor to ground a gate of the gate-coupling transistor. A comparator compares voltages of the charger and battery nodes, and the compare output is latched to generate the enable signal. An inverse enable signal activates a second switch that drives the voltage-boosted clock to the gate of the gate-coupling transistor to turn off the power transistor.

Abstract: An error amplifier can be used to control a power regulator transistor. The error amplifier has a main amplifier, a pull-up auxiliary amplifier, and a pull-down auxiliary amplifier that all drive an output. A compensating capacitor on the output sets a single dominant pole for all amplifiers, increasing stability. High slew rates are provided by increased slew current from the auxiliary amplifiers that turn on when the differential input has an absolute voltage difference larger than an intentional offset. The intentional offset is introduced into the auxiliary amplifiers by adjusting a p-channel to n-channel transistor ratio in a leg of the auxiliary amplifiers. A source degenerated resistor in the main amplifier reduces supply headroom and increases linearity by connecting sources of two differential transistors that receive the differential input. Cascode transistors increase gain and output impedance. Reliability is increased as no positive feedback is used in the amplifiers.

Abstract: An error amplifier can be used to control a power regulator transistor. The error amplifier has a main amplifier, a pull-up auxiliary amplifier, and a pull-down auxiliary amplifier that all drive an output. A compensating capacitor on the output sets a single dominant pole for all amplifiers, increasing stability. High slew rates are provided by increased slew current from the auxiliary amplifiers that turn on when the differential input has an absolute voltage difference larger than an intentional offset. The intentional offset is introduced into the auxiliary amplifiers by adjusting a p-channel to n-channel transistor ratio in a leg of the auxiliary amplifiers. A source degenerated resistor in the main amplifier reduces supply headroom and increases linearity by connecting sources of two differential transistors that receive the differential input. Cascode transistors increase gain and output impedance. Reliability is increased as no positive feedback is used in the amplifiers.