Patents by Inventor Chikayuki Okamoto

Chikayuki Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10879367
    Abstract: A gate electrode (3) is provided on a main surface of a silicon substrate (1) via a gate insulating film (2). A source/drain region (4,5) is provided on sides of the gate electrode (3) on the main surface of the silicon substrate (1). A first silicide (6) is provided on an upper face and side faces of the gate electrode (3). A second silicide (7) is provided on a surface of the source/drain region (4,5). No side-wall oxide film is provided on the side faces of the gate electrode (3). The second silicide (7) is provided at a point separated from the gate electrode (3).
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: December 29, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Chikayuki Okamoto
  • Publication number: 20200035803
    Abstract: A gate electrode (3) is provided on a main surface of a silicon substrate (1) via a gate insulating film (2). A source/drain region (4,5) is provided on sides of the gate electrode (3) on the main surface of the silicon substrate (1). A first silicide (6) is provided on an upper face and side faces of the gate electrode (3). A second silicide (7) is provided on a surface of the source/drain region (4,5). No side-wall oxide film is provided on the side faces of the gate electrode (3). The second silicide (7) is provided at a point separated from the gate electrode (3).
    Type: Application
    Filed: April 19, 2017
    Publication date: January 30, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Chikayuki OKAMOTO
  • Patent number: 9466675
    Abstract: A recess is formed by partially etching a silicon carbide substrate. A mask layer is formed on the silicon carbide substrate by means of photolithography using the recess as an alignment mark. An impurity is implanted into the silicon carbide substrate using the mask layer. The silicon carbide substrate is annealed. After the annealing, a first electrode layer is deposited on the silicon carbide substrate. The first electrode layer is patterned by means of photolithography using the recess in the silicon carbide substrate as an alignment mark.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: October 11, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito Miyazaki, Chikayuki Okamoto
  • Publication number: 20160056241
    Abstract: A recess is formed by partially etching a silicon carbide substrate. A mask layer is formed on the silicon carbide substrate by means of photolithography using the recess as an alignment mark. An impurity is implanted into the silicon carbide substrate using the mask layer. The silicon carbide substrate is annealed. After the annealing, a first electrode layer is deposited on the silicon carbide substrate. The first electrode layer is patterned by means of photolithography using the recess in the silicon carbide substrate as an alignment mark.
    Type: Application
    Filed: March 4, 2014
    Publication date: February 25, 2016
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito MIYAZAKI, Chikayuki OKAMOTO
  • Patent number: 5710066
    Abstract: Sidewalls of patterned resist are reformed using a reforming agent selected from the group consisting of (a) a carbon trichloride radical, (b) a mixture of silicon ion and oxygen ion, (c) a mixture of carbon ion and carbon monoxide ion, (d) a chlorine radical, (e) aluminum trichloride liquid and (f) dibutyl magnesium liquid, and sidewall reformed portions are thus formed on the sidewalls of pattern resist. The not reformed portion of the patterned resist is removed away, and sidewall reformed portions are left on an object layer. The portion of object layer excluding the portion immediately below sidewall reformed portions is etched away, and fine patterns of object layer are formed as a result.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: January 20, 1998
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Chikayuki Okamoto, Tadashi Nishioka, Satoru Kawazu
  • Patent number: 5688723
    Abstract: Sidewalls of patterned resist are reformed using a reforming agent selected from the group consisting of (a) a carbon trichloride radical, (b) a mixture of silicon ion and oxygen ion, (c) a mixture of carbon ion and carbon monoxide ion, (d) a chlorine radical, (e) aluminum trichloride liquid and (f) dibutyl magnesium liquid, and sidewall reformed portions are thus formed on the sidewalls of pattern resist. The not reformed portion of the patterned resist is removed away, and sidewall reformed portions are left on an object layer. The portion of object layer excluding the portion immediately below sidewall reformed portions is etched away, and fine patterns of object layer are formed as a result.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: November 18, 1997
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Chikayuki Okamoto, Tadashi Nishioka, Satoru Kawazu
  • Patent number: 5595941
    Abstract: Sidewalls of patterned resist are reformed using a reforming agent selected from the group consisting of (a) a carbon trichloride radical, (b) a mixture of silicon ion and oxygen ion, (c) a mixture of carbon ion and carbon monoxide ion, (d) a chlorine radical, (e) aluminum trichloride liquid and (f) dibutyl magnesium liquid, and sidewall reformed portions are thus formed on the sidewalls of pattern resist. The not reformed portion of the patterned resist is removed away, and sidewall reformed portions are left on an object layer. The portion of object layer excluding the portion immediately below sidewall reformed portions is etched away, and fine patterns of object layer are formed as a result.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: January 21, 1997
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Chikayuki Okamoto, Tadashi Nishioka, Satoru Kawazu