Patents by Inventor Chil-Nam Yoon

Chil-Nam Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9520160
    Abstract: A memory module includes a plurality of semiconductor memory devices and a circuit board. The circuit board is electrically connected to the plurality of semiconductor memory devices, and a signal line is disposed in the outermost layer of the circuit board. An electrical reference for the signal line is provided in a layer of the circuit board that is not adjacent to the outermost layer. Accordingly, an impedance of the signal line may be increased, and signal integrity of a signal transmitted through the signal line may be improved.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: December 13, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chil-Nam Yoon, Seon-Ryeong Kang, Hui-Chong Shin
  • Publication number: 20140301125
    Abstract: A memory module includes a plurality of semiconductor memory devices and a circuit board. The circuit board is electrically connected to the plurality of semiconductor memory devices, and a signal line is disposed in the outermost layer of the circuit board. An electrical reference for the signal line is provided in a layer of the circuit board that is not adjacent to the outermost layer. Accordingly, an impedance of the signal line may be increased, and signal integrity of a signal transmitted through the signal line may be improved.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 9, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: CHIL-NAM YOON, SEON-RYEONG KANG, HUI-CHONG SHIN
  • Patent number: 7652949
    Abstract: A memory module includes a first memory group including a plurality of memory devices, a second memory group including a less number of memory devices with respect to the memory devices in the first memory group, a register configured to provide a command/address signal to the first memory group and a delayed command/address signal to the second memory group, a first signal line configured to transfer the command/address signal to the first memory group, and a second signal line configured to transfer the delayed command/address signal to the second memory group.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: January 26, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chil-Nam Yoon, Young-Man Ahn, Young-Jun Park, Sung-Joo Park
  • Patent number: 7390973
    Abstract: The pesent invention discloses a memory module and a signal line arrangement method thereof. The memory module includes memory chips mounted on both sidees in a mirror form; and a printed circuit board (PCB) having same signal applying contact pads arranged on both sodes which same signal applying balls of the memory chips contact in the mirror form, wherein a via is formed at a location close to the same signal applying contact pad of one side among the same signal applying contact pads arranged on both sides in the mirror form, the via connecting the other side to the signal line of one side, and a signal transmitted from the other side is connected to a contact junction, the contact junction is connected to the same signal applying contact pad of the other side, the contact junction is connected to the via of the other side, and the via of one side is connected to the same signal applying contact pad of one side.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: June 24, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chil-Nam Yoon, Kwang-Seop Kim, Do-Hyung Kim, Jae-Jun Lee, Ki-Hyun Ko
  • Publication number: 20070127304
    Abstract: A memory module includes a first memory group including a plurality of memory devices, a second memory group including a less number of memory devices with respect to the memory devices in the first memory group, a register configured to provide a command/address signal to the first memory group and a delayed command/address signal to the second memory group, a first signal line configured to transfer the command/address signal to the first memory group, and a second signal line configured to transfer the delayed command/address signal to the second memory group.
    Type: Application
    Filed: December 4, 2006
    Publication date: June 7, 2007
    Inventors: Chil-Nam Yoon, Young-Man Ahn, Young-Jun Park, Sung-Joo Park
  • Publication number: 20060207788
    Abstract: In a memory module and a signal line arrangement method thereof, the memory module comprises: memory chips mounted on both sides of the module in a mirrored configuration; and a printed circuit board (PCB) having same signal applying contact pads arranged on both sides in contact with same signal applying balls of the memory chips in the mirrored configuration, the PCB including a via at a location proximal to the same signal applying contact pad of one side of the PCB among the same signal applying contact pads arranged on both sides in the mirrored configuration, the via connecting an other side of the PCB to the one side of the PCB, and a contact junction connected to the same signal applying contact pad of the other side of the PCB, the contact junction being connected to the via of the other side of the PCB, and the via of the one side of the PCB being connected to the same signal applying contact pad of the one side of the PCB, the contact junction connected to a signal terminal from the other side of t
    Type: Application
    Filed: February 17, 2006
    Publication date: September 21, 2006
    Inventors: Chil-Nam Yoon, Kwang-Seop Kim, Do-Hyung Kim, Jae-Jun Lee, Ki-Hyun Ko
  • Patent number: 7106613
    Abstract: The present invention discloses a memory module and a method of arranging a signal line of the same.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: September 12, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chil-Nam Yoon, Byung-Se So, Jung-Joon Lee, Jae-Jun Lee, Young-Jun Park, Il-Sung Yu
  • Publication number: 20050185439
    Abstract: The present invention discloses a memory module and a method of arranging a signal line of the same.
    Type: Application
    Filed: February 24, 2005
    Publication date: August 25, 2005
    Inventors: Chil-Nam Yoon, Byung-Se So, Jung-Joon Lee, Jae-Jun Lee, Young-Jun Park, Il-Sung Yu
  • Publication number: 20050002241
    Abstract: A memory system includes a memory controller, a memory bus connected to the memory controller, and a plurality of memory modules connected along the memory bus, where each of the memory modules includes a plurality of memory devices. The system also includes a dummy stub or a dummy module connected to the memory bus between the memory controller and the memory module closest to the memory controller among the plurality of memory modules. The dummy stub or dummy module improves a signal integrity of at least the memory module closest to the memory controller.
    Type: Application
    Filed: May 4, 2004
    Publication date: January 6, 2005
    Inventors: Sung-Joo Park, Byung-Se So, Jung-Joon Lee, Jae-Jun Lee, Chil-Nam Yoon