Patents by Inventor Chin-Cheng Kuo

Chin-Cheng Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121899
    Abstract: An electronic device includes a substrate, a plurality of flexible circuit boards, a plurality of ICs and an insulator. The flexible circuit boards are disposed on the substrate. In a top view of the electronic device, the flexible circuit boards are overlapped with an edge of the substrate. The ICs are disposed on the substrate. The insulator is disposed on the flexible circuit boards and contacted the ICs, wherein the insulator has a first side and a second side opposite to the first side and the first side is closer to the edge than the second side. Along a first direction perpendicular to an extension direction of the edge, a first minimum distance between the second side and one of the ICs is less than a second minimum distance between the second side and one of the flexible circuit boards.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Chin-Cheng Kuo, Chia-Chun Yang, Wen-Cheng Huang
  • Patent number: 11889627
    Abstract: A display device includes a first substrate, a second substrate, a plurality of drive ICs and at least one flexible circuit board. The first substrate has a first region and a second region near to the first region. The second substrate is disposed on the first region and has a lateral side. The plurality of drive ICs are disposed on the second region and arranged along the lateral side. The at least one flexible circuit board is disposed on the second region and disposed correspondingly to the lateral side. Wherein in a top view of the display device, each of the plurality of drive ICs does not overlap with the at least one flexible circuit board in a direction perpendicular to an extending direction of the lateral side.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: January 30, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Chin-Cheng Kuo, Chia-Chun Yang, Wen-Cheng Huang
  • Patent number: 11806710
    Abstract: A semiconductor package structure includes a substrate, a die and a conductive structure. The die is disposed on or within the substrate. The die has a first surface facing away from the substrate and includes a sensing region and a pad at the first surface of the die. The first surface of the die has a first edge and a second edge opposite to the first edge. The sensing region is disposed adjacent to the first edge. The pad is disposed away from the first edge. The conductive structure electrically connects the pad and the substrate. The sensing region has a first end distal to the first edge of the first surface of the die. A distance from the first end of the sensing region to a center of the pad is equal to or greater than a distance from the first end of the sensing region to the first edge of the first surface of the die.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: November 7, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsiao-Yen Lee, Ying-Te Ou, Chin-Cheng Kuo, Chung Hao Chen
  • Patent number: 11784111
    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Chin-Cheng Kuo, Wu Chou Hsu
  • Patent number: 11784110
    Abstract: A semiconductor package may include a substrate; a microelectromechanical device disposed on the substrate; an interconnection structure connecting the substrate to the microelectromechanical device; and a metallic sealing structure surrounding the interconnection structure.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung Hao Chen, Chin-Cheng Kuo
  • Patent number: 11631631
    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, a conductive structure and at least one via structure. The conductive structure is disposed on an upper surface of the semiconductor substrate. The at least one via structure is disposed in the semiconductor substrate. A portion of the at least one via structure extends beyond the conductive structure.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: April 18, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chin-Cheng Kuo
  • Publication number: 20220384309
    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 1, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN, Chin-Cheng KUO, Wu Chou HSU
  • Publication number: 20220382107
    Abstract: An electronic device is provided. The electronic device includes a frame, a backlight module, a working panel, and a spacer. The backlight module is disposed in the frame. The working panel is disposed on the frame. The spacer is disposed between the frame and the working panel. At least a portion of the working panel and at least a portion of the spacer are in direct contact with an adhesive.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventors: Wen-Cheng HUANG, Ting-Sheng CHEN, Chia-Chun YANG, Chin-Cheng KUO
  • Publication number: 20220384310
    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, a conductive structure and at least one via structure. The conductive structure is disposed on an upper surface of the semiconductor substrate. The at least one via structure is disposed in the semiconductor substrate. A portion of the at least one via structure extends beyond the conductive structure.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 1, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chin-Cheng KUO
  • Publication number: 20220334435
    Abstract: An electronic device is provided. The electronic device includes a frame, a working panel, a case, and a tape. The frame includes a side wall and a back plate. The side wall has an outer surface. The back plate has a back plate surface. The extension direction of the back plate is different from the extension direction of the side wall. The working panel is disposed on the back plate. The working panel has a working panel surface, and the back plate surface faces away the working panel. The case is disposed on the back plate and having a case surface. The case surface is higher than the side wall. The tape is in contact with at least a portion of the outer surface and at least a portion of the working panel surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 20, 2022
    Inventors: Wen-Cheng HUANG, Ting-Sheng CHEN, Chia-Chun YANG, Chin-Cheng KUO
  • Patent number: 11442311
    Abstract: An electronic device is provided, including a frame, a working panel, and a spacer. The frame includes a side wall. The working panel is disposed on the frame. The spacer is disposed between the frame and the working panel. At least a portion of the working panel and at least a portion of the spacer are in direct contact with an adhesive.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: September 13, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Wen-Cheng Huang, Ting-Sheng Chen, Chia-Chun Yang, Chin-Cheng Kuo
  • Patent number: 11409162
    Abstract: An electronic device is provided, including a frame, a backlight module, a working panel, and a tape. The frame includes a side wall and a back plate. The side wall includes an outer surface. The extension direction of the back plate is different from the extension direction of the side wall. The backlight module is disposed on the back plate. The working panel and the back plate are disposed on the opposite sides of the backlight module. The tape is in contact with at least a portion of the outer surface and the working panel.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: August 9, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Wen-Cheng Huang, Ting-Sheng Chen, Chia-Chun Yang, Chin-Cheng Kuo
  • Publication number: 20220245319
    Abstract: A method is disclosed herein. The method includes: providing, by an electronic design automation (EDA), a trigger signal to an application programming interface (API); providing, by the API, first parameters associated with parameterized cells in a netlist of an integrated circuit (IC); adjusting, by the API, the first parameters to generate second parameters associated with the parameterized cells in the netlist of the IC; updating, by the API, the netlist of the IC according to the second parameters; and performing, by the EDA, a simulation according to the netlist.
    Type: Application
    Filed: April 12, 2022
    Publication date: August 4, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsun-Yu YANG, Ren-Hong FU, Chin-Cheng KUO, Jui-Feng KUAN
  • Publication number: 20220237360
    Abstract: A method is disclosed herein. The method includes: connecting a first number of elements in an integrated circuit (IC); parameterizing, by a processor, the first number into first parameters; generating, by the processor, second parameters of the IC based on the first parameters; and adjusting the IC based on the second parameters.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsun-Yu YANG, Ren-Hong FU, Chin-Cheng KUO, Jui-Feng KUAN
  • Patent number: 11314914
    Abstract: A method is disclosed herein. The method includes: adjusting first parameters associated with parameterized cells in a netlist of an integrated circuit (IC) to generate second parameters associated with the parameterized cells in the netlist of the IC; updating the netlist of the IC according to the second parameters; and performing a simulation according to the netlist.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: April 26, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsun-Yu Yang, Ren-Hong Fu, Chin-Cheng Kuo, Jui-Feng Kuan
  • Publication number: 20210379590
    Abstract: A semiconductor package structure includes a substrate, a die and a conductive structure. The die is disposed on or within the substrate. The die has a first surface facing away from the substrate and includes a sensing region and a pad at the first surface of the die. The first surface of the die has a first edge and a second edge opposite to the first edge. The sensing region is disposed adjacent to the first edge. The pad is disposed away from the first edge. The conductive structure electrically connects the pad and the substrate. The sensing region has a first end distal to the first edge of the first surface of the die. A distance from the first end of the sensing region to a center of the pad is equal to or greater than a distance from the first end of the sensing region to the first edge of the first surface of the die.
    Type: Application
    Filed: June 4, 2020
    Publication date: December 9, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsiao-Yen LEE, Ying-Te OU, Chin-Cheng KUO, Chung Hao CHEN
  • Patent number: 11187851
    Abstract: A display device is provided. The display device includes a display panel that has a polarizer, a light source assembly, a first spacer, and a second spacer. The first spacer is disposed on the first side of the display panel near the light source assembly. The first spacer is located between the display panel and the light source assembly. The second spacer is disposed on the second side of the display panel, away from the light source assembly. The thickness of the first spacer is different than that of the second spacer.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: November 30, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Chien-Chih Chen, Chia-Chun Yang, Chin-Cheng Kuo
  • Publication number: 20210227692
    Abstract: A manufacturing method of a display device is disclosed. The method includes the following steps. A first substrate having a first region and a second region is provided. A second substrate is disposed on the first substrate. The second substrate is overlapping the first region. At least one drive IC is disposed on the second region. A protection layer is disposed on the second region. The protection layer is disposed enclosing the at least one drive IC. The protection layer has a maximum height larger than a maximum height of the at least one drive IC.
    Type: Application
    Filed: April 6, 2021
    Publication date: July 22, 2021
    Inventors: Chin-Cheng Kuo, Chia-Chun Yang, Wen-Cheng Huang
  • Publication number: 20210200035
    Abstract: An electronic device is provided, including a frame, a working panel, and a spacer. The frame includes a side wall. The working panel is disposed on the frame. The spacer is disposed between the frame and the working panel. At least a portion of the working panel and at least a portion of the spacer are in direct contact with an adhesive.
    Type: Application
    Filed: March 17, 2021
    Publication date: July 1, 2021
    Inventors: Wen-Cheng HUANG, Ting-Sheng CHEN, Chia-Chun YANG, Chin-Cheng KUO
  • Publication number: 20210200036
    Abstract: An electronic device is provided, including a frame, a backlight module, a working panel, and a tape. The frame includes a side wall and a back plate. The side wall includes an outer surface. The extension direction of the back plate is different from the extension direction of the side wall. The backlight module is disposed on the back plate. The working panel and the back plate are disposed on the opposite sides of the backlight module. The tape is in contact with at least a portion of the outer surface and the working panel.
    Type: Application
    Filed: March 17, 2021
    Publication date: July 1, 2021
    Inventors: Wen-Cheng HUANG, Ting-Sheng CHEN, Chia-Chun YANG, Chin-Cheng KUO