Abstract: A motor is provided and driven by two phase. The first and second control signals have a phase difference of 90 degrees and are configured to control the first and second driving units, respectively, and the first and second control signals drive the first and second coil sets, respectively. Each of the first and second poles of the permanent magnet occupies a mechanical angle of 360/2n degrees of the permanent magnet, respectively, and n is 1 or 3. The four sets of the coils of the stator are equally located on the stator, each set of the coil occupies a mechanical angle of 360/2m degrees of the stator, any two sets of the coils adjacent to each other are separated by a mechanical angle of 90?(360/2m) degrees, and m is 3 or 2, wherein m corresponds to 2 when n is 1, m corresponds to 3 when n is 3.

Abstract: The present invention provides a method for preventing and/or treating a NSAID-induced gastric ulcer. The method comprises administrating an effective amount of a lactic acid bacterium set to a subject. The lactic acid bacterium set comprises Lactobacillus plantarum GKD7 and Pediococcus acidilactici GKA4.

Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.

Abstract: A chip package includes a substrate, a semiconductor chip, and a thermal conductive structure. The chip package includes a first and a second support structures below the thermal conductive structure. The first and the second support structures connect the substrate and corners of the thermal conductive structure. The thermal conductive structure has a side edge connecting the first and the second support structures. The first and the second support structures and the side edge together define of an opening exposing a space surrounding the semiconductor chip. The first and the second support structures are disposed along a side of the substrate. The first support structure is laterally separated from the side of the substrate by a first lateral distance. The side edge of the thermal conductive structure is laterally separated from the side of the substrate by a second lateral distance different than the first lateral distance.

Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.

Abstract: An embodiment interfacial bonding test structure may include a first substrate having a first planar surface, a second substrate having a second planar surface that is parallel to the first planar surface, a first semiconductor die, and a second semiconductor die, each semiconductor die bonded between the first substrate and the second substrate thereby forming a sandwich structure. The first semiconductor die and the second semiconductor die may be bonded to the first surface with a first adhesive and may be bonded to the second surface with a second adhesive. The first semiconductor die and the second semiconductor die may be displaced from one another by a first separation along a direction parallel to the first planar surface and the second planar surface. The second substrate may include a notch having an area that overlaps with an area of the first separation in a plan view.

Abstract: A radar signal processing system with a self-interference cancelling function includes an analog front end (AFE) processor, an analog to digital converter (ADC), an adaptive interference canceller (AIC), and a digital to analog converter (DAC). The AFE processor receives an original input signal and generates an analog input signal. The ADC converts the analog input signal to a digital input signal. The AIC generates a digital interference signal digital interference signal by performing an adaptive interference cancellation process according to the digital input signal. The DAC converts the digital interference signal to an analog interference signal. Finally, the analog interference signal is fed back to the AFE and cancelled from the original input signal in the AFE processor while performing the front end process, reducing the interference of the static interference from the leaking of a close-by transmitter during the front end process.

Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.

Abstract: A composition with Lactobacillus paracasei and a method to treat nasopharyngeal carcinoma through induction of pyroptosis or cell cycle arrest; Lactobacillus paracasei GMNL-653 or heat-killed whole-bacterial liquids thereof are taken as effective ingredients for inhibiting proliferations of nasopharyngeal carcinoma cells or reducing a probability of nasopharyngeal carcinoma development through pyroptosis or cell cycle arrest instead of the mechanism of apoptosis.

Abstract: A multimode line driver circuit is provided. The multimode line driver circuit has a first driver circuit for receiving a first differential input signal and transmitting a first differential output signal, and a second driver circuit for receiving a second driver circuit for receiving a second differential input signal and transmitting a second differential output signal. The multimode line driver circuit also has a first switch coupling the first driver circuit to a first power supply and a second switch coupling the second driver circuit to a second power supply. The multimode line driver circuit also has a transformer coupled to the output interface for transforming the first differential output and the second differential output and a mode controller configured to close the first switch in the first mode and to close the second switch in the second mode.

Abstract: A circuit comprises an amplifier circuit and a trimming circuit. The amplifier circuit includes an operational amplifier. The operational amplifier has a first input configured to receive input signals, and the operational amplifier also has a second input and an amplifier output. One of the first input or the second input is a negative input. The trimming circuit is coupled to the amplifier output. The trimming circuit includes a termination resistor coupled in parallel with at least one trimming resistor. The termination resistor is coupled to a first switch in series, and the trimming resistor is coupled to a second switch in series. The amplifier output is connected back to the negative input through the first switch.

Abstract: A line driver for a communications system requiring multiple power sources for different modes of operation comprises a current source and a voltage source coupled in parallel with the current source. The current source has a first terminal and a second terminal. The line driver further comprises a first source resistor coupled to the first terminal of the current source and a second source resistor coupled to the second terminal of the current source. The current source provides a driving current and the voltage source provides a driving voltage at the same time during operations of the communications system.

Abstract: A circuit comprises an amplifier circuit and a trimming circuit. The amplifier circuit includes an operational amplifier. The operational amplifier has a first input configured to receive input signals, and the operational amplifier also has a second input and an amplifier output. One of the first input or the second input is a negative input. The trimming circuit is coupled to the amplifier output. The trimming circuit includes a termination resistor coupled in parallel with at least one trimming resistor. The termination resistor is coupled to a first switch in series, and the trimming resistor is coupled to a second switch in series. The amplifier output is connected back to the negative input through the first switch.

Abstract: A multimode line driver circuit is provided. The multimode line driver circuit has a first driver circuit for receiving a first differential input signal and transmitting a first differential output signal, and a second driver circuit for receiving a second driver circuit for receiving a second differential input signal and transmitting a second differential output signal. The multimode line driver circuit also has a first switch coupling the first driver circuit to a first power supply and a second switch coupling the second driver circuit to a second power supply. The multimode line driver circuit also has a transformer coupled to the output interface for transforming the first differential output and the second differential output and a mode controller configured to close the first switch in the first mode and to close the second switch in the second mode.

Abstract: A line driver for a communications system requiring multiple power sources for different modes of operation comprises a current source and a voltage source coupled in parallel with the current source. The current source has a first terminal and a second terminal. The line driver further comprises a first source resistor coupled to the first terminal of the current source and a second source resistor coupled to the second terminal of the current source. The current source provides a driving current and the voltage source provides a driving voltage at the same time during operations of the communications system.

Abstract: A multimode line driver circuit is provided having improved performance. The multimode line driver comprises at least first and second driver circuits that, when “active,” respectively transmit data using first and second modes. The multimode line driver further comprises a circuit arrangement including a voltage regulator and an associated set of switches. In operation, at least some of the switches are coupled to the second driver circuit and are turned on when the first driver circuit is active. The voltage regulator supplies a direct current to at least some of the turned-on switches in order to decrease a common mode voltage at the second driver circuit while the first driver circuit transmits data using the first mode. As such, components of the second driver circuit can be powered off while the first driver circuit is active, thus reducing power consumption in the first mode.

Abstract: A multimode line driver circuit is provided having improved performance. The multimode line driver comprises at least first and second driver circuits that, when “active,” respectively transmit data using first and second modes. The multimode line driver further comprises a circuit arrangement including a voltage regulator and an associated set of switches. In operation, at least some of the switches are coupled to the second driver circuit and are turned on when the first driver circuit is active. The voltage regulator supplies a direct current to at least some of the turned-on switches in order to decrease a common mode voltage at the second driver circuit while the first driver circuit transmits data using the first mode. As such, components of the second driver circuit can be powered off while the first driver circuit is active, thus reducing power consumption in the first mode.