Patents by Inventor Chin-hsien Wu
Chin-hsien Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948278Abstract: An image quality improvement method and an image processing apparatus using the same are provided. Denoising filtering is performed to an original image by a filter to obtain a preliminary processing image. The preliminary processing image is input to a multi-stage convolutional network model to generate an optimization image through the multi-stage convolutional network model. The multi-stage convolutional network model includes multiple convolutional network sub-models, and these convolutional network sub-models respectively correspond to different network architectures.Type: GrantFiled: August 18, 2021Date of Patent: April 2, 2024Assignee: National Chengchi UniversityInventors: Yan-Tsung Peng, Sha-Wo Huang, Ming-Hao Lin, Chin-Hsien Wu, Chun-Lin Tang
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Publication number: 20240097347Abstract: An antenna structure includes an input waveguide, a first output waveguide, and a second output waveguide. The first output waveguide is connected through a first Z-shaped slot to the input waveguide. The second output waveguide is adjacent to the first output waveguide. The second output waveguide is connected through a second Z-shaped slot to the input waveguide.Type: ApplicationFiled: August 14, 2023Publication date: March 21, 2024Inventors: Chin-Hsien WU, Tsun-Che HUANG
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Publication number: 20240063549Abstract: A transparent electromagnetic wave focusing device is provided, which includes a plurality of metamaterial unit cells arranged to form a metamaterial array plate, and each metamaterial unit cell includes a plurality of metal layers and a plurality of transparent substrates stacked alternately. Each of the metal layers has a comb-tooth pattern, and the plurality of metamaterial unit cells correspond to a plurality of comb-tooth pattern combinations, respectively. The metamaterial array plate has an incident surface and an exit surface opposite to each other, and for an incident electromagnetic wave with a predetermined operating frequency band incident from the incident surface, the metamaterial unit cells correspond to a plurality of compensation phase differences, such that the incident electromagnetic wave that passes through the exit surface are focused on a reference point. The comb-tooth pattern combinations vary with the corresponding compensation phase differences.Type: ApplicationFiled: March 9, 2023Publication date: February 22, 2024Inventors: CHIN-HSIEN WU, WEI-TUNG YANG, TSUN-CHE HUANG
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Patent number: 11590174Abstract: Disclosed herein is a method for treating an osteoarthritis in a subject in need thereof. The method mainly includes administering to the subject an effective amount of isolated mitochondria. According to some embodiments of the present disclosure, the isolated mitochondria are administered to the subject in need in the amount of about 1 mg/kg to about 100 mg/kg.Type: GrantFiled: September 29, 2020Date of Patent: February 28, 2023Assignee: E-DA CANCER HOSPITALInventors: Ming-Wei Lin, Hsin-Yi Tsai, I-Ming Jou, Chin-Hsien Wu
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Publication number: 20220122225Abstract: An image quality improvement method and an image processing apparatus using the same are provided. Denoising filtering is performed to an original image by a filter to obtain a preliminary processing image. The preliminary processing image is input to a multi-stage convolutional network model to generate an optimization image through the multi-stage convolutional network model. The multi-stage convolutional network model includes multiple convolutional network sub-models, and these convolutional network sub-models respectively correspond to different network architectures.Type: ApplicationFiled: August 18, 2021Publication date: April 21, 2022Applicant: National Chengchi UniversityInventors: Yan-Tsung Peng, Sha-Wo Huang, Ming-Hao Lin, Chin-Hsien Wu, Chun-Lin Tang
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Publication number: 20220096557Abstract: Disclosed herein is a method for treating an osteoarthritis in a subject in need thereof. The method mainly includes administering to the subject an effective amount of isolated mitochondria. According to some embodiments of the present disclosure, the isolated mitochondria are administered to the subject in need in the amount of about 1 mg/kg to about 100 mg/kg.Type: ApplicationFiled: September 29, 2020Publication date: March 31, 2022Applicant: E-DA CANCER HOSPITALInventors: Ming-Wei LIN, Hsin-Yi TSAI, I-Ming JOU, Chin-Hsien WU
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Patent number: 10159502Abstract: An arthroscopic positioning instrument is provided to overcome the problem of inconvenient operation of the modern arthroscopic positioning instrument. The arthroscopic positioning instrument includes a handle, a positioning member and a guiding cylinder is disclosed. The handle includes a finger holding member, a palm holding member and at least one connecting member. The palm holding member is connected to the finger holding member via the at least one connecting member. The finger holding member includes one end provided with an engaging portion and an arched guiding groove. The palm holding member does not intrude into a maximum axial range of the engaging portion. The positioning member includes an arched end and a hook end. The arched end is received in the arched guiding groove. The guiding cylinder is coupled with the engaging portion of the finger holding member.Type: GrantFiled: October 27, 2016Date of Patent: December 25, 2018Assignee: E-DA HEALTHCARE GROUPInventors: Chin-Hsien Wu, Ting-Sheng Lin, Jiun-Ru Jiang
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Publication number: 20180064452Abstract: An arthroscopic positioning instrument is provided to overcome the problem of inconvenient operation of the modern arthroscopic positioning instrument. The arthroscopic positioning instrument includes a handle, a positioning member and a guiding cylinder is disclosed. The handle includes a finger holding member, a palm holding member and at least one connecting member. The palm holding member is connected to the finger holding member via the at least one connecting member. The finger holding member includes one end provided with an engaging portion and an arched guiding groove. The palm holding member does not intrude into a maximum axial range of the engaging portion. The positioning member includes an arched end and a hook end. The arched end is received in the arched guiding groove. The guiding cylinder is coupled with the engaging portion of the finger holding member.Type: ApplicationFiled: October 27, 2016Publication date: March 8, 2018Inventors: Chin-Hsien Wu, Ting-Sheng Lin, Jiun-Ru Jiang
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Publication number: 20130018426Abstract: A bone plate module with adjustable fixing direction includes a bone plate, an adjustment ring and a bone nail. The bone plate has a coupling hole. The adjustment ring is disposed in the coupling hole and has a thread portion. The adjustment ring further comprises a first adjustment member and a second adjustment member. The first adjustment member has a first end coupled with a first end of the second adjustment member. The bone nail has an adjustment portion coupled with the thread portion of the adjustment ring.Type: ApplicationFiled: July 11, 2011Publication date: January 17, 2013Inventors: Feng-Te Tsai, Chih-Kun Hsiao, Ting-Sheng Lin, Yuan-Kun Tu, Ching-Hou Ma, Chin-Hsien Wu
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Patent number: 8010770Abstract: A caching device is positioned between a memory read/write controller and a flash memory, which contains an instruction register, a logical address register, a data register, a pair of auxiliary controllers, a microprocessor, an address translation unit, a flash memory address register, a caching control unit, and a caching instruction and data buffer area. Among them, the microprocessor is the core of the caching device responsible not only for the reading and writing the flash memory but also for the caching operation for logical and physical address translation. The caching control unit is a programmable device containing the instruction and data for caching the logical and physical address mapping. The caching instruction and data buffer area temporarily stores the caching instruction and data used by the caching control unit.Type: GrantFiled: August 20, 2007Date of Patent: August 30, 2011Assignee: Genesys Logic, Inc.Inventors: Chin-hsien Wu, Tei-wei Kuo, Hsiang-Chi Hsieh
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Patent number: 7890693Abstract: A flash translation layer apparatus is disclosed. The flash translation layer apparatus coupled to a flash memory and a reading and writing controller, respectively. The flash translation layer apparatus includes an instruction register, a logical address register, a data register, a first auxiliary controller, a microprocessor, an address converting unit, a second auxiliary controller, a flash address register and an adjustable translation layer unit. Furthermore, the adjustable translation layer unit regards the block as a unit for a coarse-grained address translation table and regards the pages as a unit for a fine-grained address translation table, respectively. Therefore, the present invention can provide capabilities of reducing the spaces and the times of a null data collection procedure and increasing the efficiency when a logical address corresponds to a physical address.Type: GrantFiled: January 23, 2008Date of Patent: February 15, 2011Assignee: Genesys Logic, Inc.Inventors: Cheng-chih Yang, Tei-wei Kuo, Chin-hsien Wu
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Patent number: 7761648Abstract: A caching method provides a cashing mechanism between a logical addresses and a flash memory physical addresses. The caching mechanism involves a search tree which contains a number of internal and external translation nodes. Each external translation node points to a link list of translation units, and each translation unit records a range of logical addresses and the corresponding range of physical addresses, in addition to a version value. By traversing the search tree to reach a translation unit, the physical address of a target logical address can be determined in an efficient manner. The version value of the translation unit can be used to determine the space taken up for storing the mapping of the logical and physical addresses should be released for reuse.Type: GrantFiled: August 23, 2007Date of Patent: July 20, 2010Assignee: Genesys Logic, Inc.Inventors: Chin-hsien Wu, Tei-wei Kuo, Hsiang-chi Hsieh
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Publication number: 20080183955Abstract: A flash translation layer apparatus is disclosed. The flash translation layer apparatus coupled to a flash memory and a reading and writing controller, respectively. The flash translation layer apparatus includes an instruction register, a logical address register, a data register, a first auxiliary controller, a microprocessor, an address converting unit, a second auxiliary controller, a flash address register and an adjustable translation layer unit. Furthermore, the adjustable translation layer unit regards the block as a unit for a coarse-grained address translation table and regards the pages as a unit for a fine-grained address translation table, respectively. Therefore, the present invention can provide capabilities of reducing the spaces and the times of a null data collection procedure and increasing the efficiency when a logical address corresponds to a physical address.Type: ApplicationFiled: January 23, 2008Publication date: July 31, 2008Applicant: GENESYS LOGIC, INC.Inventors: Cheng-chih Yang, Tei-wei Kuo, Chin-hsien Wu
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Publication number: 20080162792Abstract: A caching device is positioned between a memory read/write controller and a flash memory, which contains an instruction register, a logical address register, a data register, a pair of auxiliary controllers, a microprocessor, an address translation unit, a flash memory address register, a caching control unit, and a caching instruction and data buffer area. Among them, the microprocessor is the core of the caching device responsible not only for the reading and writing the flash memory but also for the caching operation for logical and physical address translation. The caching control unit is a programmable device containing the instruction and data for caching the logical and physical address mapping. The caching instruction and data buffer area temporarily stores the caching instruction and data used by the caching control unit.Type: ApplicationFiled: August 20, 2007Publication date: July 3, 2008Applicant: Genesys Logic, Inc.Inventors: Chin-hsien Wu, Tei-wei Kuo, Hsiang-chi Hsieh
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Publication number: 20080126684Abstract: A caching method provides a cashing mechanism between a logical addresses and a flash memory physical addresses. The cashing mechanism involves a search tree which contains a number of internal and external translation nodes. Each external translation node points to a link list of translation units, and each translation unit records a range of logical addresses and the corresponding range of physical addresses, in addition to a version value. By traversing the search tree to reach a translation unit, the physical address of a target logical address can be determined in an efficient manner. The version value of the translation unit can be used to determine the space taken up for storing the mapping of the logical and physical addresses should be released for reuse.Type: ApplicationFiled: August 23, 2007Publication date: May 29, 2008Applicant: Genesys Logic, Inc.Inventors: Chin-hsien Wu, Tei-wei Kuo, Hsiang-chi Hsieh