Patents by Inventor Chin-Hung Tseng

Chin-Hung Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170954
    Abstract: A motor control method for coupled an electronic vehicle is provided. The motor controller controls a motor and is powered by a battery. The motor control method includes: when a main relay of the motor controller suddenly breaks contact, in a first phase, feeding back a surge current into the battery to suppress the surge current by a diode and a first current limit resistor of a first protecting circuit of the motor controller; and, in a second phase, conducting a discharge switch of a second protecting circuit of the motor controller by a control unit of the motor controller, and releasing the surge current to a reference voltage range by the discharge switch and a second current limit resistor of the second protecting circuit.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 23, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Nan-Hsiung TSENG, Bing-Ren CHEN, Shin-Hung CHANG, Chin-Hone LIN
  • Patent number: 6290631
    Abstract: A method for recovering the alignment mark on a substrate to the top of a dielectric layer. The method includes the steps of forming a dielectric layer over a substrate, and then forming a cap layer over the dielectric layer. The cap layer fills the trench in the dielectric layer directly above the alignment mark and covers the area surrounding the trench. Thereafter, a global planarization is carried out to remove the top portion of the cap layer. Finally, the remaining portion of the cap layer is removed to expose the dielectric layer so that an alignment mark re-emerges on top of the dielectric layer.
    Type: Grant
    Filed: January 25, 1999
    Date of Patent: September 18, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Hsun Chu, Chin-Hung Tseng
  • Publication number: 20010001735
    Abstract: A method for recovering the alignment mark on a substrate to the top of a dielectric layer. The method includes the steps of forming a dielectric layer over a substrate, and then forming a cap layer over the dielectric layer. The cap layer fills the trench in the dielectric layer directly above the alignment mark and covers the area surrounding the trench. Thereafter, a global planarization is carried out to remove the top portion of the cap layer. Finally, the remaining portion of the cap layer is removed to expose the dielectric layer so that an alignment mark re-emerges on top of the dielectric layer.
    Type: Application
    Filed: January 25, 1999
    Publication date: May 24, 2001
    Inventors: CHIH-HSUN CHU, CHIN-HUNG TSENG
  • Patent number: 6180537
    Abstract: A method for fabricating a dielectric layer in an alignment marker area is provided. A wafer having an alignment marker area is formed. The alignment marker area has large trenches and small trenches formed in the wafer. A dielectric layer is formed over the wafer. Portions of the dielectric layer directly above the large trenches in the alignment marker area are removed to form trench structures.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: January 30, 2001
    Assignee: United Silicon Incorporated
    Inventor: Chin-Hung Tseng
  • Patent number: 6015744
    Abstract: A method of manufacturing a shallow trench isolation alignment mark comprises the steps of first providing a silicon wafer whose surface has an alignment mark formed thereon. Next, a silicon nitride layer is formed over the silicon wafer, and then shallow trenches are formed. At least one of the shallow trenches is positioned at a distance of about 2000 .ANG. to 10000 .ANG. from the edge of the alignment mark. Thereafter, an oxide layer is formed over the silicon nitride layer, and then a chemical-mechanical polishing operation is conducted to remove a portion of the oxide layer and silicon nitride layer above the alignment mark. Altogether, a layer of silicon nitride having a thickness of about 600 .ANG. is removed from the top of the alignment mark. Finally, the silicon nitride layer is also removed. By forming a shallow trench at a distance of between 2000 .ANG. to 10000 .ANG.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: January 18, 2000
    Assignee: United Silicon Incorporated
    Inventor: Chin-Hung Tseng