Abstract: Techniques are disclosed for maintaining processing unit core affinity for fragmented packets. In one example, a service physical interface card (PIC) implementing a service plane of a network device receives fragmented and/or non-fragmented packet data for a traffic flow. The service PIC comprises at least one processing unit comprising multiple cores. A routing engine operating in a control plane of the network device defines one or more core groups comprising a subset of the cores. The routing engine assigns the traffic flow to a core group and a forwarding engine operating in a forwarding plane of the network device forwards the packet data for the traffic flow to the assigned core group. A core of the assigned core group applies a network service to the fragmented and/or non-fragmented packet data for the traffic flow, and the forwarding engine forwards the packet data for the traffic flow toward a destination.

Abstract: Techniques are disclosed for maintaining processing unit core affinity for fragmented packets. In one example, a service physical interface card (PIC) implementing a service plane of a network device receives fragmented and/or non-fragmented packet data for a traffic flow. The service PIC comprises at least one processing unit comprising multiple cores. A routing engine operating in a control plane of the network device defines one or more core groups comprising a subset of the cores. The routing engine assigns the traffic flow to a core group and a forwarding engine operating in a forwarding plane of the network device forwards the packet data for the traffic flow to the assigned core group. A core of the assigned core group applies a network service to the fragmented and/or non-fragmented packet data for the traffic flow, and the forwarding engine forwards the packet data for the traffic flow toward a destination.

Abstract: Techniques are disclosed for maintaining processing unit core affinity for fragmented packets. In one example, a service physical interface card (PIC) implementing a service plane of a network device receives fragmented and/or non-fragmented packet data for a traffic flow. The service PIC comprises at least one processing unit comprising multiple cores. A routing engine operating in a control plane of the network device defines one or more core groups comprising a subset of the cores. The routing engine assigns the traffic flow to a core group and a forwarding engine operating in a forwarding plane of the network device forwards the packet data for the traffic flow to the assigned core group. A core of the assigned core group applies a network service to the fragmented and/or non-fragmented packet data for the traffic flow, and the forwarding engine forwards the packet data for the traffic flow toward a destination.

Abstract: An automated method of analyzing crosstalk in a digital logic integrated circuit, the method operating on a digital computer, is described. The method uses available software to make an extracted, parameterized netlist from a layout of the integrated circuit. For at least one potential victim wire of the plurality of wires, determining a subset of the wires of the chip are found to be potential aggressor wires that may couple to the victim wire. The aggressor wires are combined into a common aggressor. A risetime of the common aggressor is calculated and used to calculate the magnitude of coupled noise on the victim wire induced by the aggressor wires. An alarm threshold for each potential victim wire is determined based upon the type of logic gate that receives the victim wire.

Abstract: An automated method of analyzing crosstalk in a digital logic integrated circuit on a digital computer is described. The method uses available software to make an extracted, parameterized netlist from a layout of the integrated circuit. The netlist has gate and black box invocations as well as transistor invocations. Library models are used to find driving resistances and capacitances associated with the gate and black-box invocations. For at least one potential victim wire of the plurality of wires, a subset of the wires of the chip are found to be potential aggressor wires to the victim wire. The aggressor wires are combined into a common aggressor. A risetime of the common aggressor is calculated and used to calculate the magnitude of coupled noise on the victim wire induced by the aggressor wires. An alarm threshold for each potential victim wire is determined based upon the type of logic gate that receives the victim wire.