Patents by Inventor Chin Wah LIM

Chin Wah LIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • TECHNIQUES FOR DUTY CYCLE CORRECTION
    Publication number: 20240113700
    Abstract: Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A magnitude of a duty cycle error as compared to a programmable target duty cycle is determined based on the measured duty cycle and the duty cycle is adjusted based, at least in part, on the magnitude of the duty cycle error.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 4, 2024
    Inventors: Christopher P. MOZAK, Ralph S. LI, Chin Wah LIM, Mahmoud ELASSAL, Anant BALAKRISHNAN, Isaac ALI
  • Techniques for duty cycle correction
    Patent number: 11916554
    Abstract: Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A magnitude of a duty cycle error as compared to a programmable target duty cycle is determined based on the measured duty cycle and the duty cycle is adjusted based, at least in part, on the magnitude of the duty cycle error.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: February 27, 2024
    Assignee: Intel Corporation
    Inventors: Christopher P. Mozak, Ralph S. Li, Chin Wah Lim, Mahmoud Elassal, Anant Balakrishnan, Isaac Ali
  • TECHNIQUES FOR DUTY CYCLE CORRECTION
    Publication number: 20200119721
    Abstract: Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A magnitude of a duty cycle error as compared to a programmable target duty cycle is determined based on the measured duty cycle and the duty cycle is adjusted based, at least in part, on the magnitude of the duty cycle error.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Inventors: Christopher P. MOZAK, Ralph S. LI, Chin Wah LIM, Mahmoud ELASSAL, Anant BALAKRISHNAN, Isaac ALI