Patents by Inventor Chin-Yu Liu

Chin-Yu Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161998
    Abstract: A deflecting plate includes a silicon-on-insulator (SOI) substrate. The SOI substrate includes: an insulator layer having a top surface and a bottom surface; a device layer coupled to the insulator layer at the top surface, wherein multiple deflecting apertures are disposed in the device layer, each of which extending from a top open end to a bottom open end through the device layer, and wherein the bottom open end is coplanar with the top surface of the insulator layer; and a handle substrate coupled to the insulator layer at the bottom surface, wherein a cavity is disposed in the handle substrate and extends from a cavity open end to a cavity bottom wall, and wherein the bottom wall is coplanar with the top surface of the insulator layer, such that the bottom open end of each deflecting aperture is exposed to the cavity.
    Type: Application
    Filed: September 10, 2023
    Publication date: May 16, 2024
    Inventors: Cheng-Hsien Chou, Yung-Lung Lin, Chun Liang Chen, Kuan-Liang Liu, Chin-Yu Ku, Jong-Yuh Chang
  • Patent number: 11983475
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
  • Patent number: 11979978
    Abstract: Monolithic power stage (Pstage) packages and methods for using same are provided that may be implemented to provide lower thermal resistance/enhanced thermal performance, reduced noise, and/or smaller package footprint than conventional monolithic Pstage packages. The conductive pads of the disclosed Pstage packages may be provided with a larger surface area for contacting respective conductive layers of a mated PCB to provide a more effective and increased heat transfer away from a monolithic Pstage package. In one example, the increased heat transfer away from the monolithic Pstage package results in lower monolithic Pstage package operating temperature and increased power output.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: May 7, 2024
    Assignee: Dell Products L.P.
    Inventors: Merle Wood, III, Chin-Jui Liu, Shiguo Luo, Feng-Yu Wu
  • Patent number: 11942398
    Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li Yang, Wen-Hsiung Lu, Jhao-Yi Wang, Fu Wei Liu, Chin-Yu Ku
  • Publication number: 20210287397
    Abstract: An image calibration method for imaging system is provided, including: specifying a detection area located in an image capture scope and the detection area having a unit to be tested; capturing a detection image respectively when the detection area is located in at least two locations within the image capture scope; combining the plurality of detection images and calculating to obtain a calibration figure; and applying the calibration figure to a captured image to complete the calibration. In this way, the calibration figure that adapt to the luminescent type and size of the unit to be tested can be obtained.
    Type: Application
    Filed: November 9, 2020
    Publication date: September 16, 2021
    Inventors: Chin-Yu LIU, Cheng-En JIANG, Tung-Lin TANG, Chi-Yuan LIN, Hung Chun LO, Chao-Yu HUANG, Cheng-Tao TSAI
  • Patent number: 10976152
    Abstract: A method for defect inspection of a transparent substrate comprises (a) providing an optical system for performing a diffraction process of object wave passing through a transparent substrate, (b) interfering and wavefront recording for the diffracted object wave and a reference wave to reconstruct the defect complex images (including amplitude and phase) of the transparent substrate, (c) characteristics analyzing, features classifying and sieving for the defect complex images of the transparent substrate, and (d) creating defect complex images database based-on the defect complex images for comparison and detection of the defect complex images of the transparent substrate.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: April 13, 2021
    Assignee: NATIONAL TAIWAN NORMAL UNIVERSiTY
    Inventors: Chau-Jern Cheng, Chin-Yu Liu, Xin-Ji Lai
  • Publication number: 20180188016
    Abstract: A method for defect inspection of a transparent substrate comprises (a) providing an optical system for performing a diffraction process of object wave passing through a transparent substrate, (b) interfering and wavefront recording for the diffracted object wave and a reference wave to reconstruct the defect complex images (including amplitude and phase) of the transparent substrate, (c) characteristics analyzing, features classifying and sieving for the defect complex images of the transparent substrate, and (d) creating defect complex images database based-on the defect complex images for comparison and detection of the defect complex images of the transparent substrate.
    Type: Application
    Filed: May 9, 2017
    Publication date: July 5, 2018
    Inventors: Chau-Jern Cheng, Chin-Yu Liu, Xin-Ji Lai
  • Patent number: 9266813
    Abstract: The present invention provides a series of derivatives of stilbenoid which are useful as new inhibitory agents against head and neck squamous cell carcinoma (HNSCC) and hepatoma.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: February 23, 2016
    Assignee: China Medical University
    Inventors: Sheng-Chu Kuo, Jai-Sing Yang, Min-Tsang Hsieh, Tian-Shung Wu, Kuo-Hsiung Lee, Huei-Wen Chen, Li-Jiau Huang, Hsin-Yi Hung, Tzong-Der Way, Ling-Chu Chang, Hui-Yi Lin, Yung-Yi Cheng, Chin-Yu Liu
  • Publication number: 20140303241
    Abstract: The present invention provides a series of derivatives of stilbenoid which are useful as new inhibitory agents against head and neck squamous cell carcinoma (HNSCC) and hepatoma.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 9, 2014
    Applicant: AnnCare Bio-Tech Center Inc.
    Inventors: Sheng-Chu Kuo, Jai-Sing Yang, Min-Tsang Hsieh, Tian-Shung Wu, Kuo-Hsiung Lee, Huei-Wen Chen, Li-Jiau Huang, Hsin-Yi Hung, Tzong-Der Way, Ling-Chu Chang, Hui-Yi Lin, Yung-Yi Cheng, Chin-Yu Liu
  • Publication number: 20110137106
    Abstract: A magnetic clip for ear acupuncture points comprises a first clip body and a second clip body. An insulation cap is provided on one side of the first clip body, and then a first magnetic body is accommodated between the first clip body and the insulation cap. The second clip body is provided with a second magnetic body. The first magnetic body and the second magnetic body are coupled with lead wires respectively which in turn are both connected to an electric stimulator. The first magnetic body and the second magnetic body can sandwich the ear to be treated between them by magnetic force which is used simultaneously to conduct magnetic therapy on ear acupuncture points. The electric stimulator can also send electric current to the magnetic bodies through the lead wires, so as to conduct electric therapy via the stimulating probe.
    Type: Application
    Filed: December 7, 2009
    Publication date: June 9, 2011
    Inventors: Chih-Kuo Liang, Jin-Chen Tsai, Chin-Yu Liu