Patents by Inventor Ching-Hua Huang

Ching-Hua Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240191135
    Abstract: A method for reactive ion etching includes multiple steps of: (a) placing a film to be etched in a vacuum chamber; (b) introducing an etching gas into the vacuum chamber; (c) starting a reactive ion etching to etch the film via the etching gas in a first duration; (d) in a second duration, stopping reactive ion etching and extracting the remaining gas in the vacuum chamber to make the vacuum chamber be in a high-clean state; and (e) repeating step (b) to (d) until an etching depth of the film is reached to a predetermined value.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 13, 2024
    Applicant: National Cheng Kung University
    Inventors: Tse-Ming Chen, Chiu-Hua Huang, Ching-Hua Kao, Yu-Chiang Hsieh
  • Patent number: 12009322
    Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.
    Type: Grant
    Filed: February 13, 2022
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hsuan Tai, Ting-Ting Kuo, Yu-Chih Huang, Chih-Wei Lin, Hsiu-Jen Lin, Chih-Hua Chen, Ming-Da Cheng, Ching-Hua Hsieh, Hao-Yi Tsai, Chung-Shi Liu
  • Publication number: 20240180091
    Abstract: Apparatus, systems and methods for irrigating lands are disclosed. In one example, an irrigation system is disclosed. The irrigation system includes a gate and a microcontroller unit (MCU). The gate is configured for adjusting a water flow for irrigating a piece of land. The MCU is configured for controlling the gate to adjust the water flow based on environmental information related to the piece of land.
    Type: Application
    Filed: February 9, 2024
    Publication date: June 6, 2024
    Inventors: Ting-Cheng HUANG, Tai-Hua YU, Shui-Ting YANG, Chao-Te LEE, Ching Rong LU
  • Patent number: 11942464
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11935826
    Abstract: A method includes depositing a first passivation layer over a conductive feature, wherein the first passivation layer has a first dielectric constant, forming a capacitor over the first passivation layer, and depositing a second passivation layer over the capacitor, wherein the second passivation layer has a second dielectric constant greater than the first dielectric constant. The method further includes forming a redistribution line over and electrically connecting to the capacitor, depositing a third passivation layer over the redistribution line, and forming an Under-Bump-Metallurgy (UBM) penetrating through the third passivation layer to electrically connect to the redistribution line.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ming Huang, Ming-Da Cheng, Songbor Lee, Jung-You Chen, Ching-Hua Kuan, Tzy-Kuang Lee
  • Patent number: 11917955
    Abstract: Apparatus, systems and methods for irrigating lands are disclosed. In one example, an irrigation system is disclosed. The irrigation system includes a gate and a microcontroller unit (MCU). The gate is configured for adjusting a water flow for irrigating a piece of land. The MCU is configured for controlling the gate to adjust the water flow based on environmental information related to the piece of land.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Cheng Huang, Tai-Hua Yu, Shui-Ting Yang, Chao-Te Lee, Ching Rong Lu
  • Patent number: 11917923
    Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
  • Publication number: 20230357886
    Abstract: An exemplary embodiment of the present disclosure provides a method to extract components from a metal-containing material, forming a first multicomponent system comprising an ionic liquid and a first aqueous component, wherein the first aqueous component and the ionic liquid form an immiscible mixture when the first multicomponent system is at a temperature below a critical temperature, contacting a metal-containing material with the first multicomponent system, adjusting the temperature of the first multicomponent system above the first critical temperature to form a miscible mixture with the ionic liquid and the first aqueous component, reverting the temperature of the first multicomponent system below the critical temperature to form an immiscible mixture with the ionic liquid and the first aqueous component, and isolating the ionic liquid from the first aqueous component and the metal-containing material, wherein the ionic liquid comprises one or more metals from the metal-containing material.
    Type: Application
    Filed: December 18, 2020
    Publication date: November 9, 2023
    Inventors: Laura Stoy, Ching-Hua Huang
  • Publication number: 20130083437
    Abstract: An ESD elimination device includes an ESD elimination circuit connected between a power line and a ground line and an ESD detection circuit. The ESD detection circuit includes a switch unit and a resistor, the switch unit and the resistor are electrically connected between the power line and the ground line. The switch unit is turned on when an ESD event occurs in the power line, a detecting voltage is generated across the resistor when the switch unit is turned on, the detecting voltage is used for triggering the ESD elimination circuit to eliminate the ESD surge current caused by the ESD event.
    Type: Application
    Filed: June 27, 2012
    Publication date: April 4, 2013
    Applicant: Fitipower Integrated Technology, Inc.
    Inventor: CHING-HUA HUANG
  • Publication number: 20090327307
    Abstract: A personal routine system that automatically traces and links a users' time, locations and activities. The person routine system includes a position recording unit for recording the user's location information, a routine tracking system having a first mapping module for matching data and files the data with the user's time and location information, and a service platform. The routine tracking system also provides a browse function and a search function for the matched records and transfers them to the service platform. The service platform stores the records transmitted from a second network interface into a second storage unit and uses a user interface to display the records stored in the second storage unit and further provides the browse and search functions.
    Type: Application
    Filed: June 26, 2008
    Publication date: December 31, 2009
    Inventors: Fang-Cheng Sun, Chai-Wang Chang, Wei-Kang Lin, An-Chi Lin, Ching-Hua Huang
  • Publication number: 20070252615
    Abstract: A logic-keeping apparatus including a logic judgment unit and a noise-event detection unit is disclosed. When the level at the input terminal of the logic judgment unit is larger than a first level, the output terminal thereof outputs a first logic state; when the level at the input terminal is smaller than a second level, the output terminal thereof outputs a second logic state; when the level at the input terminal is between the first level and the second level, the output terminal thereof keeps the previous logic state. The noise-event detection unit is for detecting whether a noise-event occurs (for example, an ESD event). Wherein, when a noise-even occurs in the system, the noise-event detection unit keeps the level at the input terminal of the logic judgment unit between the first level and the second level.
    Type: Application
    Filed: June 23, 2006
    Publication date: November 1, 2007
    Inventors: Chyh-Yih Chang, Ching-Hua Huang
  • Publication number: 20070247183
    Abstract: A logic-latching apparatus includes a noise-event detection unit, a combinational logic unit and a latch unit. The noise-event detection unit is used for detecting whether or not a noise-event occurs (for example, an ESD). The latch unit is coupled with the noise-event detection unit and the combinational logic unit for latching the state of the combinational logic unit. When the output of the noise-event detection unit indicates that a noise-event occurs, the latch unit provides the input terminal of the combinational logic unit with a corresponding input signal according to the latched state of the combinational logic unit inside the latch unit to prevent the state of the combinational logic unit from being affected by the noise-event.
    Type: Application
    Filed: May 11, 2006
    Publication date: October 25, 2007
    Inventors: Chyh-Yih Chang, Ching-Hua Huang
  • Patent number: D601535
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: October 6, 2009
    Assignee: Chi Mei Communication Systems, Inc.
    Inventor: Ching-Hua Huang
  • Patent number: D610140
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: February 16, 2010
    Assignee: Chi Mei Communication Systems, Inc.
    Inventor: Ching-Hua Huang