Patents by Inventor Ching-Liang Huang
Ching-Liang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240170462Abstract: A micro light-emitting diode display device and a micro light-emitting diode structure. The micro light-emitting diode display device includes a circuit substrate and a plurality of display pixels, the display pixels are arranged on the circuit substrate and are electrically connected with the circuit substrate individually. Each display pixel includes a plurality of series-connection structures, and the light wavelengths of the series-connection structures are different. Each series-connection structure includes at least two micro light-emitting elements, and the light wavelengths of the at least two micro light-emitting elements are within a wavelength range of one color light. The circuit substrate provides a driving voltage to drive the series-connection structures of each display pixel.Type: ApplicationFiled: January 30, 2024Publication date: May 23, 2024Inventors: Yun-Li LI, Yi-Ru HUANG, Chi-Hao CHENG, Ching-Liang LIN
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Patent number: 11972984Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.Type: GrantFiled: December 26, 2022Date of Patent: April 30, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ching-Ling Lin, Wen-An Liang, Chen-Ming Huang
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Publication number: 20240124350Abstract: A quantum dot composite structure and a method for forming the same are provided. The quantum dot composite structure includes: a glass particle including a glass matrix and a plurality of quantum dots located in the glass matrix, wherein at least one of the plurality of quantum dots includes an exposed surface in the glass matrix; and an inorganic protective layer disposed on the glass particle and covering the exposed surface.Type: ApplicationFiled: October 13, 2023Publication date: April 18, 2024Inventors: Ching LIU, Wen-Tse HUANG, Ru-Shi LIU, Pei Cong YAN, Chai-Chun HSIEH, Hung-Chun TONG, Yu-Chun LEE, Tzong-Liang TSAI
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Patent number: 11545605Abstract: A display panel including a pixel circuit substrate, a planarization layer, a plurality of bonding pads, a plurality of light-emitting devices, a plurality of auxiliary electrodes, and a reflective structure layer is provided. The pixel circuit substrate has a plurality of signal lines. The planarization layer covers the signal lines. The bonding pads are disposed on the planarization layer and are electrically connected to the signal lines. The light-emitting devices are electrically bonded to the bonding pads. The auxiliary electrodes are disposed between the bonding pads. The reflective structure layer is disposed between the light-emitting devices and overlaps at least part of the auxiliary electrodes and the bonding pads. A method of fabricating the display panel is also provided.Type: GrantFiled: November 4, 2021Date of Patent: January 3, 2023Assignee: Au Optronics CorporationInventors: Hsun-Yi Wang, Chan-Jui Liu, Chiao-Li Huang, Ching-Liang Huang, Chun-Cheng Cheng
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Publication number: 20220376150Abstract: A display panel including a pixel circuit substrate, a planarization layer, a plurality of bonding pads, a plurality of light-emitting devices, a plurality of auxiliary electrodes, and a reflective structure layer is provided. The pixel circuit substrate has a plurality of signal lines. The planarization layer covers the signal lines. The bonding pads are disposed on the planarization layer and are electrically connected to the signal lines. The light-emitting devices are electrically bonded to the bonding pads. The auxiliary electrodes are disposed between the bonding pads. The reflective structure layer is disposed between the light-emitting devices and overlaps at least part of the auxiliary electrodes and the bonding pads. A method of fabricating the display panel is also provided.Type: ApplicationFiled: November 4, 2021Publication date: November 24, 2022Applicant: Au Optronics CorporationInventors: Hsun-Yi Wang, Chan-Jui Liu, Chiao-Li Huang, Ching-Liang Huang, Chun-Cheng Cheng
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Publication number: 20210343526Abstract: A manufacturing method of a crystallized metal oxide layer includes: providing a substrate; forming a first insulation layer on the substrate; forming a first metal oxide layer on the first insulation layer; forming a second metal oxide layer on the first insulation layer; forming a second insulation layer on the first metal oxide layer and the second metal oxide layer; forming a silicon layer on the second insulation layer; performing a first laser process on a portion of the silicon layer covering the first metal oxide layer; and performing a second laser process on a portion of the silicon layer covering the second metal oxide layer. An active device and a manufacturing method thereof are also provided.Type: ApplicationFiled: July 14, 2021Publication date: November 4, 2021Applicant: Au Optronics CorporationInventors: Jia-Hong Ye, Ching-Liang Huang
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Patent number: 11094540Abstract: A manufacturing method of a crystallized metal oxide layer includes: providing a substrate; forming a first insulation layer on the substrate; forming a first metal oxide layer on the first insulation layer; forming a second metal oxide layer on the first insulation layer; forming a second insulation layer on the first metal oxide layer and the second metal oxide layer; forming a silicon layer on the second insulation layer; performing a first laser process on a portion of the silicon layer covering the first metal oxide layer; and performing a second laser process on a portion of the silicon layer covering the second metal oxide layer. An active device and a manufacturing method thereof are also provided.Type: GrantFiled: March 29, 2019Date of Patent: August 17, 2021Assignee: Au Optronics CorporationInventors: Jia-Hong Ye, Ching-Liang Huang
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Patent number: 10566357Abstract: The present invention provides a method for crystallizing a metal oxide semiconductor layer, a semiconductor structure, a method for manufacturing a semiconductor structure, an active array substrate, and an indium gallium zinc oxide crystal. The crystallization method includes the following steps: forming an amorphous metal oxide semiconductor layer on a substrate; forming an oxide layer on the amorphous metal oxide semiconductor layer; forming an amorphous silicon layer on the oxide layer; and irradiating the amorphous silicon layer by using a laser, so as to heat the amorphous silicon layer, where the heated amorphous silicon layer heats the amorphous metal oxide semiconductor layer, so that the amorphous metal oxide semiconductor layer is converted into a crystallized metal oxide semiconductor layer.Type: GrantFiled: December 11, 2017Date of Patent: February 18, 2020Assignee: AU OPTRONICS CORPORATIONInventors: Jia-Hong Ye, Ching-Liang Huang
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Publication number: 20190304779Abstract: A manufacturing method of a crystallized metal oxide layer includes: providing a substrate; forming a first insulation layer on the substrate; forming a first metal oxide layer on the first insulation layer; forming a second metal oxide layer on the first insulation layer; forming a second insulation layer on the first metal oxide layer and the second metal oxide layer; forming a silicon layer on the second insulation layer; performing a first laser process on a portion of the silicon layer covering the first metal oxide layer; and performing a second laser process on a portion of the silicon layer covering the second metal oxide layer. An active device and a manufacturing method thereof are also provided.Type: ApplicationFiled: March 29, 2019Publication date: October 3, 2019Applicant: Au Optronics CorporationInventors: Jia-Hong Ye, Ching-Liang Huang
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Patent number: 10382228Abstract: In the subject system, a customer virtual local network (VLAN) tag is protected using, for example, media access control security (MACSec). MACSec authentication is performed on a packet by including the VLAN tag in an integrity check value (ICV) computation. When a packet is received from an Ethernet Virtual Connection (EVC) at an ingress port of the subject system, a remote site is identified and an associated VLAN tag is determined based on the identified remote site and a VLAN tag associated with the packet. The subject system may perform VLAN tag mapping to account for changes in a VLAN tag across EVCs. An ICV is computed based on the determined VLAN tag and compared with an ICV stored in the received packet. The integrity check passes when the computed ICV matches the stored ICV and fails when the computed ICV does not match the stored ICV.Type: GrantFiled: June 2, 2015Date of Patent: August 13, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventor: Ching-Liang Huang
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Publication number: 20180166474Abstract: The present invention provides a method for crystallizing a metal oxide semiconductor layer, a semiconductor structure, a method for manufacturing a semiconductor structure, an active array substrate, and an indium gallium zinc oxide crystal. The crystallization method includes the following steps: forming an amorphous metal oxide semiconductor layer on a substrate; forming an oxide layer on the amorphous metal oxide semiconductor layer; forming an amorphous silicon layer on the oxide layer; and irradiating the amorphous silicon layer by using a laser, so as to heat the amorphous silicon layer, where the heated amorphous silicon layer heats the amorphous metal oxide semiconductor layer, so that the amorphous metal oxide semiconductor layer is converted into a crystallized metal oxide semiconductor layer.Type: ApplicationFiled: December 11, 2017Publication date: June 14, 2018Inventors: Jia-Hong YE, Ching-Liang HUANG
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Publication number: 20150381531Abstract: In the subject system, a customer virtual local network (VLAN) tag is protected using, for example, media access control security (MACSec). MACSec authentication is performed on a packet by including the VLAN tag in an integrity check value (ICV) computation. When a packet is received from an Ethernet Virtual Connection (EVC) at an ingress port of the subject system, a remote site is identified and an associated VLAN tag is determined based on the identified remote site and a VLAN tag associated with the packet. The subject system may perform VLAN tag mapping to account for changes in a VLAN tag across EVCs. An ICV is computed based on the determined VLAN tag and compared with an ICV stored in the received packet. The integrity check passes when the computed ICV matches the stored ICV and fails when the computed ICV does not match the stored ICV.Type: ApplicationFiled: June 2, 2015Publication date: December 31, 2015Inventor: Ching-Liang HUANG
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Patent number: 7120683Abstract: An architecture for creating a single image for a stack of switches. A plurality of the internetworking devices are provided in a stack configuration for interconnecting networks. Software is executed in each internetworking device such that the stack of internetworking devices appear as a single internetworking device to the interconnected networks.Type: GrantFiled: April 3, 2001Date of Patent: October 10, 2006Assignee: Zarlink Semiconductor V.N. Inc.Inventor: James Ching-Liang Huang
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Publication number: 20020046271Abstract: An architecture for creating a single image for a stack of switches. A plurality of the internetworking devices are provided in a stack configuration for interconnecting networks. Software is executed in each internetworking device such that the stack of internetworking devices appear as a single internetworking device to the interconnected networks.Type: ApplicationFiled: April 3, 2001Publication date: April 18, 2002Inventor: James Ching-Liang Huang
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Patent number: D426707Type: GrantFiled: April 2, 1999Date of Patent: June 20, 2000Inventors: Ching-Liang Huang, Ling-Fang Lee