Abstract: A sensor device comprises a sensor element for measuring a stimulus and generating a corresponding signal, an ADC for convert the signal to a multi-bit digital signal, a memory unit for storing the digital signal, and a timing unit for switching off the sensor element when the ADC is converting the signal and for switching off the ADC after the digital signal is stored in the memory.

Abstract: A sensor device comprises a sensor element for measuring a stimulus and generating a corresponding signal, an ADC for convert the signal to a multi-bit digital signal, a memory unit for storing the digital signal, and a timing unit for switching off the sensor element when the ADC is converting the signal and for switching off the ADC after the digital signal is stored in the memory.

Abstract: Some embodiments provide a system that generates a coil switching signal for a brushless DC motor. During operation, the system determines a magnetic field of the brushless DC motor at a first time and a magnetic field of the brushless DC motor at a second time. Then, the coil switching signal is generated based on a relationship between the magnetic field determined at the first time and a first predetermined threshold, and the magnetic field determined at the second time and a second predetermined threshold.

Abstract: Some embodiments provide a system that generates a coil switching signal for a brushless DC motor. During operation, the system determines a magnetic field of the brushless DC motor at a first time and a magnetic field of the brushless DC motor at a second time. Then, the coil switching signal is generated based on a relationship between the magnetic field determined at the first time and a first predetermined threshold, and the magnetic field determined at the second time and a second predetermined threshold.

Abstract: Some embodiments provide a system that generates a coil switching signal for a brushless DC motor. During operation, the system determines a magnetic field of the brushless DC motor at a first time and a magnetic field of the brushless DC motor at a second time. Then, the coil switching signal is generated based on a relationship between the magnetic field determined at the first time and a first predetermined threshold, and the magnetic field determined at the second time and a second predetermined threshold.

Abstract: Some embodiments provide a system that generates a coil switching signal for a brushless DC motor. During operation, the system determines a magnetic field of the brushless DC motor at a first time and a magnetic field of the brushless DC motor at a second time. Then, the coil switching signal is generated based on a relationship between the magnetic field determined at the first time and a first predetermined threshold, and the magnetic field determined at the second time and a second predetermined threshold.

Abstract: Various apparatuses, methods and systems for a voltage regulator are disclosed herein. For example, some embodiments provide an apparatus for regulating a voltage including an N-channel transistor that is connected between an input and an output, an error amplifier that is connected to the output, a capacitor that is connected between the error amplifier and a gate of the N-channel transistor, and a comparator that is connected to a node between the error amplifier and the capacitor. The apparatus also includes a charge pump that is switchably connected to the gate of the N-channel transistor. The apparatus is adapted to connect the charge pump to the gate of the N-channel transistor when a voltage at the node between the error amplifier and the capacitor rises above a threshold voltage.

Abstract: Various apparatuses, methods and systems for a voltage regulator are disclosed herein. For example, some embodiments provide an apparatus for regulating a voltage including an N-channel transistor that is connected between an input and an output, an error amplifier that is connected to the output, a capacitor that is connected between the error amplifier and a gate of the N-channel transistor, and a comparator that is connected to a node between the error amplifier and the capacitor. The apparatus also includes a charge pump that is switchably connected to the gate of the N-channel transistor. The apparatus is adapted to connect the charge pump to the gate of the N-channel transistor when a voltage at the node between the error amplifier and the capacitor rises above a threshold voltage.

Abstract: A programmable gain amplifier using metal-oxide-semiconductor (MOS) devices to approximate exponential gain characteristic with linear control signals is disclosed. According to one embodiment, the programmable gain amplifier (300a-300b) may include a capacitive switching circuit (304a-304b), a capacitive switching circuit (306a-306b), and an operational amplifier (302a-302b). Capacitive switching circuits (304a-304b and 306a-306b) may receive an analog input voltage through sample switches (308a-308b and 310a-310b). Capacitive switching circuit (304a-304b) receives an output from operational amplifier (302a-302b) through feedback switch (312a-312b). The programmable gain amplifier (300a-300b) may include a few additional unit capacitors which can allow larger gain ranges or more steps for a given range without a large increase in chip size.

Abstract: An averaging circuit includes: input signal nodes for providing input signals 330; a multiplexing circuit 320 coupled to the input signal nodes for switching between the input signals 330 to create a time waveform; a low pass filter 300 coupled to an output 340 of the multiplexing circuit 320 for filtering the time waveform to create an average signal; and an average replication circuit 310 coupled to an output 350 of the low pass filter 300.

Abstract: An image processing apparatus for charge coupled device (CCD) and video inputs in a digital camera or for a digital camcorder is disclosed which provides optical black and offset correction for CCD inputs. A sampling circuit, including correlated double sampler (CDS) (402) and programmable gain amplifier (450), samples the image input signal and the video input signal. CDS (402) includes a single-ended amplifier (404) and a differential amplifier (406). The single-ended amplifier (404) functions such that it is only operable during an CCD signal input; otherwise, the single-ended amplifier (404) is bypassed such that a video signal is only sampled by the differential amplifier (406). For CCD signals, the single-ended amplifier (404) samples the reference level of the pixel and holds it during the video interval. The differential amplifier (404) samples both the output of the single ended amplifier (404) and the video level of the same pixel.

Abstract: A programmable gain amplifier using metal-oxide-semiconductor (MOS) devices to approximate exponential gain characteristic with linear control signals is disclosed. According to one embodiment, the programmable gain amplifier (300a-300b) may include a capacitive switching circuit (304a-304b), a capacitive switching circuit (306a-306b), and an operational amplifier (302a-302b). Capacitive switching circuits (304a-304b and 306a-306b) may receive an analog input voltage through sample switches (308a-308b and 310a-310b). Capacitive switching circuit (304a-304b) receives an output from operational amplifier (302a-302b) through feedback switch (312a-312b). The programmable gain amplifier (300a-300b) may include a few additional unit capacitors which can allow larger gain ranges or more steps for a given range without a large increase in chip size.

Abstract: A programmable gain amplifier using metal-oxide-semiconductor (MOS) devices to approximate exponential gain characteristic with linear control signals is disclosed. According to one embodiment, the programmable gain amplifier (300a-300b) may include a capacitive switching circuit (304a-304b), a capacitive switching circuit (306a-306b), and an operational amplifier (302a-302b). Capacitive switching circuits (304a-304b and 306a-306b) may receive an analog input voltage through sample switches (308a-308b and 310a-310b). Capacitive switching circuit (304a-304b) receives an output from operational amplifier (302a-302b) through feedback switch (312a-312b). The programmable gain amplifier (300a-300b) may include a few additional unit capacitors which can allow larger gain ranges or more steps for a given range without a large increase in chip size.

Abstract: A correlated double sampled/programmable gain amplifier (CDS/PGA) is disclosed which is operable to precondition a CCD output analog signal. The CDS/PGA includes an operational amplifier that is configured in a sample hold operation. The single-ended input is first clamped by a switch (34) to clamp the DC level therein for a given pixel. A switch (38) then samples the reset level onto a sampling capacitor (46), and a switch (42) thereafter samples the video signal onto one plate of a capacitor (50). The lower plates of the capacitors (46) and (50) are then equalized and the other plates thereof connected to the positive and negative inputs of the operational amplifier (68). An offset is provided by a programmable DAC (26) to account for the dark current offset. The output scale is adjusted or mapped by limiting the output between a negative and a positive reference input. The sampling capacitors (46) and (50) can be varied to vary the gain of the amplifier.

Abstract: A programmable gain amplifier using metal-oxide-semiconductor (MOS) devices to approximate exponential gain characteristic with linear control signals is disclosed. According to one embodiment, the programmable gain amplifier (300a-300b) may include a capacitive switching circuit (304a-304b), a capacitive switching circuit (306a-306b), and an operational amplifier (302a-302b). Capacitive switching circuits (304a-304b and 306a-306b) may receive an analog input voltage through sample switches (308a-308b and 310a-310b). Capacitive switching circuit (304a-304b) receives an output from operational amplifier (302a-302b) through feedback switch (312a-312b). The programmable gain amplifier (300a-300b) may include a few additional unit capacitors which can allow larger gain ranges or more steps for a given range without a large increase in chip size.

Abstract: A CMOS programmable gain amplifier (10) is disclosed which provides exponential gain using a single gain element (19) which may be implemented in either bipolar or CMOS technology. An embodiment of the present invention includes a first and second sampling impedance (12, 14), a first and second feedback impedance (16, 18) and a gain element (19). The gain element (19) having an inverting input, a non-inverting input and an output. The inverting input connects to the first sampling impedance (12). The non-inverting input connects to the second sampling impedance (14). The first feedback impedance (16) connects between the inverting input and the output. The second feedback impedance (18) connects between the non-inverting input and the output.

Abstract: A segmented digital-to-analog converter includes: upper segments 200, 210, and 220; a thermometer decoder 400; a randomizing circuit 410 coupled between the thermometer decoder 400 and the upper segments 200, 210, and 220 for randomizing an output of the thermometer decoder 400; a divider location selector circuit 420 coupled between the randomizing circuit 410 and the upper segments 200, 210, and 220 for choosing a selected segment from the upper segments 200, 210, and 220; and lower segments 225 coupled to the selected segment.

Abstract: An averaging circuit includes: input signal nodes for providing input signals 330; a multiplexing circuit 320 coupled to the input signal nodes for switching between the input signals 330 to create a time waveform; a low pass filter 300 coupled to an output 340 of the multiplexing circuit 320 for filtering the time waveform to create an average signal; and an average replication circuit 310 coupled to an output 350 of the low pass filter 300.

Abstract: A segmented digital-to-analog converter includes: upper segments 200, 210, and 220; a thermometer decoder 400; a randomizing circuit 410 coupled between the thermometer decoder 400 and the upper segments 200, 210, and 220 for randomizing an output of the thermometer decoder 400; a divider location selector circuit 420 coupled between the randomizing circuit 410 and the upper segments 200, 210, and 220 for choosing a selected segment from the upper segments 200, 210, and 220; and lower segments 225 coupled to the selected segment.

Abstract: A plurality of substrate bias circuits (14, 16, and 18) are designed to provide a stable substrate reference potential for a variety of operating modes. Only one of the bias circuits is enabled by a control circuit (12) at any time for any operational mode. An on-demand boost bias circuit (16) is enabled whenever a level detector (20) indicates substrate bias has exceeded a predetermined limit during special operating modes such as burn-in or parallel test.