Patents by Inventor Chisato Furukawa

Chisato Furukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6576931
    Abstract: A semiconductor light emitting device ensuring a uniform color tone comprises a semiconductor light emitting element that emits light of a first wavelength upon injection of a current, a fluorescent material portion that contains a fluorescent material excited by light of the first wavelength to emit light of a second wavelength, and a diffuser mixed in an appropriate material around the semiconductor light emitting element.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: June 10, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chisato Furukawa, Masayuki Morishita
  • Publication number: 20030062531
    Abstract: There is disclosed a semiconductor light emitting element formed by selective growth and being high in light emitting efficiency, in which at least one GaN-based layer grown by ELO is stacked/formed on a sapphire substrate, and a fluorescent substance for converting an ultraviolet light to a visible light is contained in a selective growth mask material layer for use in this case. Since this fluorescent substance converts the ultraviolet light to the visible light, a binding efficiency of the ultraviolet light to the fluorescent substance is enhanced in either one of a center light emitting type and UV light emitting type of light emitting elements. By further containing the fluorescent substance into a passivation film, the efficiency is further enhanced.
    Type: Application
    Filed: October 28, 2002
    Publication date: April 3, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Chisato Furukawa, Hidato Sugawara, Nobuhiro Suzuki
  • Patent number: 6504181
    Abstract: There is disclosed a semiconductor light emitting element formed by selective growth and being high in light emitting efficiency, in which at least one GaN-based layer grown by ELO is stacked/formed on a sapphire substrate, and a fluorescent substance for converting an ultraviolet light to a visible light is contained in a selective growth mask material layer for use in this case. Since this fluorescent substance converts the ultraviolet light to the visible light, a binding efficiency of the ultraviolet light to the fluorescent substance is enhanced in either one of a center light emitting type and UV light emitting type of light emitting elements. By further containing the fluorescent substance into a passivation film, the efficiency is further enhanced.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: January 7, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chisato Furukawa, Hideto Sugawara, Nobuhiro Suzuki
  • Publication number: 20020088985
    Abstract: A semiconductor light emitting element, semiconductor light emitting device or image display device includes a wavelength converter for converting a wavelength into another, optical reflector having a wavelength selectivity and a light absorber having a wavelength selectivity, which are disposed in a predetermined positional relation, to prevent external leakage of primary light and to extract secondary light made by wavelength-converting the primary light with a very high efficiency. By using a semiconductor light emitting element for ultraviolet emission, or by combining it with a fluorescent material or any other appropriate material having a wavelength converting function, various kinds of applications, such as illuminator, having a remarkably long-life light source can be made. The semiconductor light emitting element preferably has a emission wavelength near 330 nm, and preferably uses BGaN in its light emitting layer.
    Type: Application
    Filed: October 23, 2001
    Publication date: July 11, 2002
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Komoto, Koichi Nitta, Nobuhiro Suzuki, Kuniaki Konno, Hideto Sugawara, Chisato Furukawa
  • Publication number: 20020011601
    Abstract: A semiconductor light emitting device ensuring a uniform color tone comprises a semiconductor light emitting element that emits light of a first wavelength upon injection of a current, a fluorescent material portion that contains a fluorescent material excited by light of the first wavelength to emit light of a second wavelength, and a diffuser mixed in an appropriate material around the semiconductor light emitting element.
    Type: Application
    Filed: July 31, 2001
    Publication date: January 31, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Chisato Furukawa, Masayuki Morishita
  • Patent number: 6340824
    Abstract: A light emitting device or image display includes a fluorescent material as a wavelength converter for converting a wavelength into another. The fluorescent material is disposed in a predetermined positional relation, to prevent external leakage of primary light and to extract secondary light made by wavelength-converting the primary light with a very high efficiency. By using a semiconductor light emitting element for ultraviolet emission and combining it with a fluorescent material or any other appropriate material having a wavelength converting function, various kinds of applications, such as illuminator, having a remarkably long-life light source can be made. The semiconductor light emitting element preferably has a emission wavelength near 330 nm, and preferably uses BGaN in its light emitting layer.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: January 22, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Komoto, Koichi Nitta, Nobuhiro Suzuki, Kuniaki Konno, Hideto Sugawara, Chisato Furukawa
  • Patent number: 6320207
    Abstract: A light emitting device has an N-type gallium nitride system compound semiconductor layer provided on a substrate; and a P-type gallium nitride system compound semiconductor layer provided on said N-type gallium nitride system compound semiconductor layer. The N-type gallium nitride compound semiconductor layer has such an area that an impurity concentration increases corresponding to a layer thickness from the side of said substrate.
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: November 20, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chisato Furukawa, Masayuki Ishikawa, Hideto Sugawara, Kenji Isomoto
  • Publication number: 20010004112
    Abstract: There is disclosed a semiconductor light emitting element formed by selective growth and being high in light emitting efficiency, in which at least one GaN-based layer grown by ELO is stacked/formed on a sapphire substrate, and a fluorescent substance for converting an ultraviolet light to a visible light is contained in a selective growth mask material layer for use in this case. Since this fluorescent substance converts the ultraviolet light to the visible light, a binding efficiency of the ultraviolet light to the fluorescent substance is enhanced in either one of a center light emitting type and UV light emitting type of light emitting elements. By further containing the fluorescent substance into a passivation film, the efficiency is further enhanced.
    Type: Application
    Filed: December 20, 2000
    Publication date: June 21, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Chisato Furukawa, Hideto Sugawara, Nobuhiro Suzuki
  • Patent number: 6017807
    Abstract: After p-type gallium nitride compound semiconductor layers, to which p-type impurity is added, are formed by virtue of chemical vapor deposition, the p-type gallium nitride compound semiconductor layers are thermally annealed at more than 400.degree. C. or more than 700.degree. C. while supplying a flow of an inert gas in parallel to a substrate surface at a predetermined flow rate or more. Otherwise, the p-type gallium nitride compound semiconductor layers are thermally annealed at more than 400.degree. C. or more than 700.degree. C. in an inert gas atmosphere having a predetermined pressure or more. According to the annealing process, the p-type impurity can be more effectively activated, so that p-type gallium nitride compound semiconductor layers which have fewer crystal defects, etc. and have lower resistivity can be formed.
    Type: Grant
    Filed: April 15, 1998
    Date of Patent: January 25, 2000
    Assignee: Kabushiki Kaisha Toshba
    Inventors: Chisato Furukawa, Masayuki Ishikawa, Hideto Sugawara, Kenji Isomoto
  • Patent number: 5981977
    Abstract: A nitride compound semiconductor light emitting element comprises a substrate, a nitride compound semiconductor n-type layer, a mask layer having a predetermined opening, a nitride compound semiconductor buffer layer epitaxially grown on said n-type layer exclusively at said opening. The buffer layer has a recess on its top face so that a thickness of said buffer layer is thinner above a central portion of the opening and thicker above edge portions of the opening. A nitride compound semiconductor active layer is selectively formed on the recess of the buffer layer to be thicker at the central portion of the recess and thinner at the edges of the recess. A nitride compound semiconductor burying layer overlays the mask layer and the active layer to cover the active layer.
    Type: Grant
    Filed: July 6, 1998
    Date of Patent: November 9, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chisato Furukawa, Hideto Sugawara, Masayuki Ishikawa, Nobuhiro Suzuki
  • Patent number: 5930656
    Abstract: A substrate for forming a compound semiconductor device is placed in a reaction chamber. An MOCVD method or a GS-MBE method is used to grow compound semiconductor layers on the substrate. The grown layers include, for example, a GaN buffer layer, an n-GaN layer, an InGaN active layer, a p-AlGaN layer, and a p.sup.+ -GaN contact layer. After the growth of the layers, the substrate is kept in the reaction chamber, and a passivation film of, for example, SiNx, SiO2, or SiON is formed on top of the grown layers according to a CVD or GS-MBE method. Since the top of the grown layers is not exposed to air outside the reaction chamber, no oxidization or contamination occurs on the top of the grown layers. The compound semiconductor device is manufactured through simpler processes compared with a prior art that needs separate apparatuses for growing and forming the layers and passivation film.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chisato Furukawa, Masayuki Ishikawa, Hideto Sugawara, Kenji Isomoto
  • Patent number: 5880487
    Abstract: A semiconductor device includes a rectangular semiconductor chip having a main surface, a stripe-form semiconductor element forming portion formed in parallel to one of sides of the semiconductor chip to cross the main surface, a first groove portion formed along one of sides of the semiconductor element forming portion in a longitudinal direction, a second groove portion formed along the other side of the semiconductor element forming portion in the longitudinal direction, the second groove portion including a hollow space which is enlarged in substantially a central portion, a surface electrode formed on at least part of an upper portion of the semiconductor element forming portion, an external lead connecting terminal electrode formed in the hollow space, a wiring formed on part of a bottom surface and a side surface, which is adjacent to stripe-form portion, of the second groove portion, for electrically connecting the surface electrode with the terminal electrode, a first dummy electrode formed at least
    Type: Grant
    Filed: July 25, 1997
    Date of Patent: March 9, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chisato Furukawa, Takayuki Matsuyama
  • Patent number: 5852624
    Abstract: In the semiconductor laser element of the present invention, a striped active layer for injecting an electrical current, is formed on the main surface of the semiconductor substrate. A pair of notches for dividing the semiconductor substrate, are made in the main surface of the semiconductor substrate so as to be in parallel with each other interposing the striped active layer. Each of the pair of notches has the ratio between the depth d thereof and a double of the width w, that is 2w, (d/2w), of 1.0 or higher.
    Type: Grant
    Filed: April 15, 1996
    Date of Patent: December 22, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Matsuyama, Chisato Furukawa
  • Patent number: 5683937
    Abstract: A semiconductor device includes a rectangular semiconductor chip having a main surface, a stripe-form semiconductor element forming portion formed in parallel to one of sides of the semiconductor chip to cross the main surface, a first groove portion formed along one of sides of the semiconductor element forming portion in a longitudinal direction, a second groove portion formed along the other side of the semiconductor element forming portion in the longitudinal direction, the second groove portion including a hollow space which is enlarged in substantially a central portion, a surface electrode formed on at least part of an upper portion of the semiconductor element forming portion, an external lead connecting terminal electrode formed in the hollow space, a wiring formed on part of a bottom surface and a side surface, which is adjacent to stripe-form portion, of the second groove portion, for electrically connecting the surface electrode with the terminal electrode, a first dummy electrode formed at least
    Type: Grant
    Filed: December 13, 1995
    Date of Patent: November 4, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chisato Furukawa, Takayuki Matsuyama