Patents by Inventor Chittranjan Mohan GUPTA

Chittranjan Mohan GUPTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178154
    Abstract: An electronic device includes a multilevel package substrate, a semiconductor die, and a molded package structure, where the multilevel package substrate has opposite first and second substrate sides, first and second conductive pads spaced apart from one another along the first substrate side, and a conductive substrate terminal that is exposed along the second substrate side and is electrically coupled to the second conductive pad. The semiconductor die is attached to the first substrate side and has opposite first and second die sides, and a die terminal along the first die side, the die terminal electrically coupled to the first conductive pad. The molded has a package side, a metal shield along the package side, and a conductive package via that extends through the molded package structure and electrically couples the metal shield to the second conductive pad.
    Type: Application
    Filed: November 29, 2022
    Publication date: May 30, 2024
    Inventors: Yiqi Tang, Rajen Manicon Murugan, Chittranjan Mohan Gupta, Jie Chen, Jaimal Mallory Williamson
  • Publication number: 20240178155
    Abstract: An electronic device includes a multilevel package substrate having a first level, a second level, a third level, a conductive signal trace that extends in the second level, and a conductive box shield that surrounds a portion of the conductive signal trace. The electronic device includes a semiconductor die attached to the multilevel package substrate and having a conductive structure coupled to an end of the conductive signal trace. The electronic device includes a package structure that encloses the semiconductor die and a portion of the multilevel package substrate.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventors: Yiqi Tang, Chittranjan Mohan Gupta, Rajen Manicon Murugan, Jie Chen
  • Publication number: 20240120297
    Abstract: An apparatus includes: a first conductor layer patterned into parallel strips having a first end and an opposite second end formed on a device side surface of a multilayer package substrate, the multilayer package substrate including conductor layers spaced from one another by dielectric material and coupled to one another by conductive vertical connection layers extending through the dielectric material; a second conductor layer in the multilayer package substrate spaced from the first conductor layer, the second conductor layer patterned into parallel strips having a first end and a second end, the second conductor layer coupled to the first conductor layer by vertical connectors formed of the conductive vertical connection layers at the first end and the second end, and a semiconductor die mounted to the device side surface of the multilayer package substrate that is spaced from and coupled to the second conductor.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 11, 2024
    Inventors: Jie Chen, Rajen Maricon Murugan, Chittranjan Mohan Gupta, Yiqi Tang
  • Publication number: 20230138570
    Abstract: In examples, a semiconductor package comprises a first driver die adapted to be coupled to a high-side switch of a power supply, the first driver die adapted to drive a gate of the high-side switch. The package also includes a second driver die adapted to be coupled to a low-side switch of the power supply, the second driver die adapted to drive a gate of the low-side switch. The package also includes a controller die positioned between the first and second driver dies and configured to control the first and second driver dies. The package also includes a pair of bond wires configured to provide a differential signal between the controller die and the first driver die, a vertical plane of a bond wire in the pair of bond wires and a vertical plane of a side surface of the first driver die having an angle therebetween ranging from 80 to 95 degrees.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 4, 2023
    Inventors: Thomas Dyer BONIFIELD, Sarvesh Jagdish BANG, Chittranjan Mohan GUPTA
  • Publication number: 20230101847
    Abstract: In examples, a semiconductor package comprises a substrate and multiple columns of semiconductor dies positioned approximately in parallel along a length of the substrate. The package also includes multiple passive components positioned between the multiple columns of semiconductor dies, the multiple passive components angled between 30 and 60 degrees relative to the length of the substrate, a pair of the multiple passive components having a gap therebetween that is configured to permit mold compound flow through capillary action. The package also includes a mold compound covering the substrate, the multiple columns of semiconductor dies, and the multiple passive components.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: Chittranjan Mohan GUPTA, Yiqi TANG, Rajen Manicon MURUGAN, Jie CHEN, Tianyi LUO
  • Publication number: 20230021179
    Abstract: A semiconductor device includes a die having an input port and an output port. The semiconductor device also includes a multilayer package substrate with pads on a surface of the multilayer package substrate configured to be coupled to circuit components of a printed circuit board. The multilayer package substrate also includes a passive filter comprising an input port and an output port, and a planar inductor. The planar inductor is coupled to a given pad of the pads of the multilayer package substrate with a first via of the multilayer package substrate and to the input port of the die with a second via of the multilayer package substrate. The planar inductor extends parallel to the surface of the multilayer package substrate.
    Type: Application
    Filed: July 19, 2021
    Publication date: January 19, 2023
    Inventors: Yiqi Tang, Rajen Manicon Murugan, Chittranjan Mohan Gupta, Jie Chen
  • Patent number: 10262957
    Abstract: An integrated circuit (IC) package includes an IC die and a wave channel that electrically couples the IC die to a solder ball array. The wave channel is configured to resonate at an operating frequency band of the IC die.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: April 16, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajen Manicon Murugan, Minhong Mi, Gary Paul Morrison, Jie Chen, Kenneth Robert Rhyner, Stanley Craig Beddingfield, Chittranjan Mohan Gupta, Django Earl Trombley
  • Publication number: 20180301428
    Abstract: A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond ball grid array package comprises a solder ball array, a millimeter wave transmit channel, and a millimeter wave receive channel, wherein each millimeter wave transmit and receive channel electrically couples the IC die to a signal ball of the solder ball array and is configured to resonate at an operating frequency band of the millimeter wave IC chip.
    Type: Application
    Filed: April 10, 2018
    Publication date: October 18, 2018
    Inventors: Rajen Manicon Murugan, Minhong Mi, Gary Paul Morrison, Jie Chen, Kenneth Robert Rhyner, Stanley Craig Beddingfield, Chittranjan Mohan Gupta, Django Earl Trombley
  • Patent number: 9941228
    Abstract: A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond ball grid array package comprises a solder ball array, a millimeter wave transmit channel, and a millimeter wave receive channel, wherein each millimeter wave transmit and receive channel electrically couples the IC die to a signal ball of the solder ball array and is configured to resonate at an operating frequency band of the millimeter wave IC chip.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: April 10, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajen Manicon Murugan, Minhong Mi, Gary Paul Morrison, Jie Chen, Kenneth Robert Rhyner, Stanley Craig Beddingfield, Chittranjan Mohan Gupta, Django Earl Trombley
  • Publication number: 20170229408
    Abstract: A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond ball grid array package comprises a solder ball array, a millimeter wave transmit channel, and a millimeter wave receive channel, wherein each millimeter wave transmit and receive channel electrically couples the IC die to a signal ball of the solder ball array and is configured to resonate at an operating frequency band of the millimeter wave IC chip.
    Type: Application
    Filed: April 25, 2017
    Publication date: August 10, 2017
    Inventors: Rajen Manicon MURUGAN, Minhong MI, Gary Paul MORRISON, Jie CHEN, Kenneth Robert RHYNER, Stanley Craig BEDDINGFIELD, Chittranjan Mohan GUPTA, Django Earl TROMBLEY
  • Patent number: 9666553
    Abstract: A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond ball grid array package comprises a solder ball array, a millimeter wave transmit channel, and a millimeter wave receive channel, wherein each millimeter wave transmit and receive channel electrically couples the IC die to a signal ball of the solder ball array and is configured to resonate at an operating frequency band of the millimeter wave IC chip.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: May 30, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajen Manicon Murugan, Minhong Mi, Gary Paul Morrison, Jie Chen, Kenneth Robert Rhyner, Stanley Craig Beddingfield, Chittranjan Mohan Gupta, Django Earl Trombley
  • Publication number: 20150364816
    Abstract: A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond ball grid array package comprises a solder ball array, a millimeter wave transmit channel, and a millimeter wave receive channel, wherein each millimeter wave transmit and receive channel electrically couples the IC die to a signal ball of the solder ball array and is configured to resonate at an operating frequency band of the millimeter wave IC chip.
    Type: Application
    Filed: June 15, 2015
    Publication date: December 17, 2015
    Inventors: Rajen Manicon MURUGAN, Minhong MI, Gary Paul MORRISON, Jie CHEN, Kenneth Robert RHYNER, Stanley Craig BEDDINGFIELD, Chittranjan Mohan GUPTA, Django Earl TROMBLEY