Patents by Inventor Chiukin (Steven) Lai

Chiukin (Steven) Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180240682
    Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein. Methods involve introducing an activation gas at a chamber pressure and/or applying a bias using a bias power selected to preferentially etch the metal at or near the opening of the feature relative to the interior region of the feature. Apparatuses include integrated hardware for performing deposition of metal and atomic layer etching of metal in the same tool and/or without breaking vacuum.
    Type: Application
    Filed: April 16, 2018
    Publication date: August 23, 2018
    Inventors: Chiukin Steven Lai, Keren Jacobs Kanarik, Samantha Tan, Anand Chandrashekar, Teh-tien Su, Wenbing Yang, Michael Wood, Michal Danek
  • Patent number: 9972504
    Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: May 15, 2018
    Assignee: Lam Research Corporation
    Inventors: Chiukin Steven Lai, Keren Jacobs Kanarik, Samantha Tan, Anand Chandrashekar, Teh-tien Su, Wenbing Yang, Michael Wood, Michal Danek
  • Publication number: 20180114694
    Abstract: A method for depositing a metal layer on a barrier layer includes a) arranging a substrate in a processing chamber. The substrate has been exposed to at least one of air and/or oxidizing chemistry and includes a barrier layer and one or more underlying layers, wherein the barrier layer includes a material selected from a group consisting of tantalum nitride, titanium nitride, tantalum and titanium. The method includes b) supplying a gas selected from a group consisting of hydrazine, a gas including fluorine species, a gas including chlorine species, derivatives of hydrazine, ammonia, carbon monoxide, a gas including amidinates, and/or a gas including metal organic ligands to the processing chamber for a predetermined period to remove oxidation from the barrier layer. The method includes c) depositing a metal layer on the barrier layer after b). The metal layer includes a metal selected from a group consisting of cobalt, copper, tungsten, ruthenium, rhodium, molybdenum, and nickel.
    Type: Application
    Filed: October 10, 2017
    Publication date: April 26, 2018
    Inventors: Raihan Tarafdar, Shruti Thombare, Jeong-Seok Na, Raashina Humayun, Chiukin Steven Lai
  • Publication number: 20170330797
    Abstract: Provided herein are methods of forming conductive cobalt (Co) interconnects and Co features. The methods involve deposition of a thin manganese (Mn)-containing film on a dielectric followed by subsequent deposition of cobalt on the Mn-containing film. The Mn-containing film may be deposited on a silicon-containing dielectric, such as silicon dioxide, and annealed to form a manganese silicate.
    Type: Application
    Filed: May 10, 2017
    Publication date: November 16, 2017
    Inventors: Chiukin Steven Lai, Jeong-Seok Na, Raashina Humayun, Michal Danek, Kaihan Abidi Ashtiani
  • Patent number: 9748137
    Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors. Methods may also involve using a remote plasma source to generate the nitrogen-based plasma. Methods also involve annealing the substrate.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: August 29, 2017
    Assignee: Lam Research Corporation
    Inventors: Chiukin Steven Lai, Jeong-Seok Na, Raihan Tarafdar, Raashina Humayun, Michal Danek
  • Publication number: 20170040214
    Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.
    Type: Application
    Filed: August 19, 2015
    Publication date: February 9, 2017
    Inventors: Chiukin Steven Lai, Keren Jacobs Kanarik, Samantha Tan, Anand Chandrashekar, Teh-tien Su, Wenbing Yang, Michael Wood, Michal Danek
  • Patent number: 9362163
    Abstract: Described are cleaning methods for removing contaminants from an electrical contact interface of a partially fabricated semiconductor substrate. The methods may include introducing a halogen-containing species into a processing chamber, and forming an adsorption-limited layer, which includes halogen from the halogen-containing species, atop the electrical contact interface and/or the contaminants thereon. The methods may further include thereafter removing un-adsorbed halogen-containing species from the processing chamber and activating a reaction between the halogen of the adsorption-limited layer and the contaminants present on the electrical contact interface. The reaction may then result in the removal of at least a portion of the contaminants from the electrical contact interface. In some embodiments, the halogen adsorbed onto the surface and reacted may be fluorine. Also described herein are apparatuses having controllers for implementing such electrical contact interface cleaning techniques.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: June 7, 2016
    Assignee: Lam Research Corporation
    Inventors: Michal Danek, Juwen Gao, Aaron Fellis, Francisco Juarez, Chiukin Steven Lai
  • Publication number: 20160056077
    Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors. Methods may also involve using a remote plasma source to generate the nitrogen-based plasma. Methods also involve annealing the substrate.
    Type: Application
    Filed: October 1, 2015
    Publication date: February 25, 2016
    Inventors: Chiukin Steven Lai, Jeong-Seok Na, Raihan Tarafdar, Raashina Humayun, Michal Danek
  • Publication number: 20150037972
    Abstract: Described are cleaning methods for removing contaminants from an electrical contact interface of a partially fabricated semiconductor substrate. The methods may include introducing a halogen-containing species into a processing chamber, and forming an adsorption-limited layer, which includes halogen from the halogen-containing species, atop the electrical contact interface and/or the contaminants thereon. The methods may further include thereafter removing un-adsorbed halogen-containing species from the processing chamber and activating a reaction between the halogen of the adsorption-limited layer and the contaminants present on the electrical contact interface. The reaction may then result in the removal of at least a portion of the contaminants from the electrical contact interface. In some embodiments, the halogen adsorbed onto the surface and reacted may be fluorine. Also described herein are apparatuses having controllers for implementing such electrical contact interface cleaning techniques.
    Type: Application
    Filed: July 29, 2014
    Publication date: February 5, 2015
    Inventors: Michal Danek, Juwen Gao, Aaron Fellis, Francisco Juarez, Chiukin Steven Lai
  • Patent number: 8846163
    Abstract: A method for removing native oxides from a substrate surface is provided. In one embodiment, the method comprises positioning a substrate having an oxide layer into a processing chamber, exposing the substrate to a gas mixture while forming a volatile film on the substrate and maintaining the substrate at a temperature below 65° C., heating the substrate to a temperature of at least about 75° C. to sublimate the volatile film and remove the oxide layer, and depositing a first layer on the substrate after heating the substrate.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: September 30, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Chien-Teh Kao, Jing-Pei (Connie) Chou, Chiukin (Steven) Lai, Sal Umotoy, Joel M. Huston, Son Trinh, Mei Chang, Xiaoxiong (John) Yuan, Yu Chang, Xinliang Lu, Wei W. Wang, See-Eng Phan
  • Publication number: 20140076234
    Abstract: A multi-chamber processing system includes a transfer chamber, a first processing chamber outfitted to perform CVD, a second processing chamber, and a robot positioned to transfer substrates between the transfer chamber, the first processing chamber, and the second processing chamber. The second processing chamber may include one or a combination of a first electrode and a second electrode comprising a plasma cavity formed therein.
    Type: Application
    Filed: October 18, 2013
    Publication date: March 20, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Chien-Teh KAO, Jing-Pei Connie CHOU, Chiukin (Steven) LAI, Salvador P. UMOTOY, Joel M. HUSTON, Son TRINH, Mei CHANG, Xiaoxiong YUAN, Yu CHANG, Xinliang LU, Wei W. WANG, See-Eng PHAN
  • Patent number: 8617348
    Abstract: Etching of nitride and oxide layers with reactant gases is modulated by etching in different process regimes. High etch selectivity to silicon nitride is achieved in an adsorption regime where the partial pressure of the etchant is lower than its vapor pressure. Low etch selectivity to silicon nitride is achieved in a condensation regime where the partial pressure of the etchant is higher than its vapor pressure. By controlling partial pressure of the etchant, very high etch selectivity to silicon nitride may be achieved.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: December 31, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Xinye Liu, Chiukin Steven Lai
  • Publication number: 20120244704
    Abstract: A method for removing native oxides from a substrate surface is provided. In one embodiment, the method comprises positioning a substrate having an oxide layer into a processing chamber, exposing the substrate to a gas mixture while forming a volatile film on the substrate and maintaining the substrate at a temperature below 65° C., heating the substrate to a temperature of at least about 75° C. to sublimate the volatile film and remove the oxide layer, and depositing a first layer on the substrate after heating the substrate.
    Type: Application
    Filed: June 5, 2012
    Publication date: September 27, 2012
    Inventors: Chien-Teh KAO, Jing-Pei(Connie) CHOU, Chiukin(Steven) LAI, Sal UMOTOY, Joel M. HUSTON, Son TRINH, Mei CHANG, Xiaoxiong (John) YUAN, Yu CHANG, Xinliang LU, Wei W. WANG, See-Eng PHAN
  • Patent number: 8187486
    Abstract: Etching of nitride and oxide layers with reactant gases is modulated by etching in different process regimes. High etch selectivity to silicon nitride is achieved in an adsorption regime where the partial pressure of the etchant is lower than its vapor pressure. Low etch selectivity to silicon nitride is achieved in a condensation regime where the partial pressure of the etchant is higher than its vapor pressure. By controlling partial pressure of the etchant, very high etch selectivity to silicon nitride may be achieved.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: May 29, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Xinye Liu, Chiukin Steven Lai
  • Publication number: 20110223755
    Abstract: A method for removing native oxides from a substrate surface is provided. In one embodiment, the method comprises positioning a substrate having an oxide layer into a processing chamber, generating a plasma of a reactive species from a gas mixture within the processing chamber, exposing the substrate to the reactive species while forming a volatile film on the substrate and maintaining the substrate at a temperature below 65° C., heating the substrate to a temperature of at least about 75° C. to vaporize the volatile film and remove the oxide layer, and depositing a first layer on the substrate after heating the substrate.
    Type: Application
    Filed: May 20, 2011
    Publication date: September 15, 2011
    Inventors: CHIEN-TEH KAO, Jing-Pei(Connie) Chou, Chiukin(Steven) Lai, Sal Umotoy, Joel M. Huston, Son Trinh, Mei Chang, Xiaoxiong (John) Yuan, Yu Chang, Xinliang Lu, Wei W. Wang, See-Eng Phan
  • Patent number: 7977249
    Abstract: Methods for removing silicon nitride and elemental silicon during contact preclean process involve converting these materials to materials that are more readily etched by fluoride-based etching methods, and subsequently removing the converted materials by a fluoride-based etch. Specifically, silicon nitride and elemental silicon may be treated with an oxidizing agent, e.g., with an oxygen-containing gas in a plasma, or with O2 or O3 in the absence of plasma to produce a material that is more rich in Si—O bonds and is more easily etched with a fluoride-based etch. Alternatively, silicon nitride or elemental silicon may be doped with a number of doping elements, e.g., hydrogen, to form materials which are more easily etched by fluoride based etches. The methods are particularly useful for pre-cleaning contact vias residing in a layer of silicon oxide based material because they minimize the unwanted increase of critical dimension of contact vias.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: July 12, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Xinye Liu, Yu Yang, Chiukin Steven Lai
  • Patent number: 7767024
    Abstract: In one embodiment, a method for removing native oxides from a substrate surface is provided which includes supporting a substrate containing silicon oxide within a processing chamber, generating a plasma of reactive species from a gas mixture within the processing chamber, cooling the substrate to a first temperature of less than about 65° C. within the processing chamber, and directing the reactive species to the cooled substrate to react with the silicon oxide thereon while forming a film on the substrate. The film usually contains ammonium hexafluorosilicate. The method further provides positioning the substrate in close proximity to a gas distribution plate, and heating the substrate to a second temperature of about 100° C. or greater within the processing chamber to sublimate or remove the film. The gas mixture may contain ammonia, nitrogen trifluoride, and a carrier gas.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: August 3, 2010
    Assignee: Appplied Materials, Inc.
    Inventors: Chien-Teh Kao, Jing-Pei (Connie) Chou, Chiukin (Steven) Lai, Sal Umotoy, Joel M. Huston, Son Trinh, Mei Chang, Xiaoxiong (John) Yuan, Yu Chang, Xinliang Lu, Wei W. Wang, See-Eng Phan
  • Publication number: 20090111280
    Abstract: A method for removing native oxides from a substrate surface is provided. In one embodiment, the method comprises positioning a substrate having an oxide layer into a processing chamber, generating a plasma of a reactive species from a gas mixture within the processing chamber, exposing the substrate to the reactive species while forming a volatile film on the substrate and maintaining the substrate at a temperature below 65° C., heating the substrate to a temperature of at least about 75° C. to vaporize the volatile film and remove the oxide layer, and depositing a first layer on the substrate after heating the substrate.
    Type: Application
    Filed: December 4, 2008
    Publication date: April 30, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Chien-Teh Kao, Jing-Pei (Connie) Chou, Chiukin (Steven) Lai, Sal Umotoy, Joel M. Huston, Son Trinh, Mei Chang, Xiaoxiong (John) Yuan, Yu Chang, Xinliang Lu, Wei W. Wang, See-Eng Phan
  • Patent number: 7520957
    Abstract: A lid assembly for semiconductor processing is provided. In at least one embodiment, the lid assembly includes a first electrode comprising an expanding section that has a gradually increasing inner diameter. The lid assembly also includes a second electrode disposed opposite the first electrode. A plasma cavity is defined between the inner diameter of the expanding section of the first electrode and a first surface of the second electrode.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: April 21, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Chien-Teh Kao, Jing-Pei (Connie) Chou, Chiukin (Steven) Lai, Sal Umotoy, Joel M. Huston, Son Trinh, Mei Chang, Xiaoxiong (John) Yuan, Yu Chang, Xinliang Lu, Wei W. Wang, See-Eng Phan
  • Publication number: 20080268645
    Abstract: In one embodiment, a method for removing native oxides from a substrate surface is provided which includes supporting a substrate containing silicon oxide within a processing chamber, generating a plasma of reactive species from a gas mixture within the processing chamber, cooling the substrate to a first temperature of less than about 65° C. within the processing chamber, and directing the reactive species to the cooled substrate to react with the silicon oxide thereon while forming a film on the substrate. The film usually contains ammonium hexafluorosilicate. The method further provides positioning the substrate in close proximity to a gas distribution plate, and heating the substrate to a second temperature of about 100° C. or greater within the processing chamber to sublimate or remove the film. The gas mixture may contain ammonia, nitrogen trifluoride, and a carrier gas.
    Type: Application
    Filed: June 6, 2008
    Publication date: October 30, 2008
    Inventors: CHIEN-TEH KAO, Jing-Pei (Connie) Chou, Chiukin (Steven) Lai, Sal Umotoy, Joel M. Huston, Son Trinh, Mei Chang, Xiaoxiong (John) Yuan, Yu Chang, Xinliang Lu, Wei W. Wang, See-Eng Phan