Abstract: A semiconductor memory having a plurality of memory cells each including a single capacitor and a single transistor for storing one bit are formed on a semiconductor substrate. Each terminal of the respective transistors of the memory cells are commonly connected to a common wiring portion, and the capacitor of each memory cell is disposed in a trench which is formed by forming a groove-like shape along the outer periphery of the semiconductor substrate for one or two adjacent transistors. The capacitor includes a first insulating film disposed over the inner wall surface of the trench, a first electrode formed entirely or partially on the surface of the first insulating film for being supplied with a predetermined voltage, a second insulating film disposed entirely over the surface of the first electrode, and a second electrode disposed on the second insulating film in an area corresponding to the inner sidewall surface of the trench and connected to the other terminal of the transistor.