Patents by Inventor Choi Byong-Deok

Choi Byong-Deok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus for clocked power logic against power analysis attack
    Patent number: 8390311
    Abstract: A logic apparatus secure against a power analysis attack is disclosed. The logic apparatus may include a clocked power logic to recover and reuse at least a part of charges supplied during a single clock operation; a first device block connected to the clocked power logic to remove a parasitic capacitance difference in the clocked power logic, and a second device block to readjust remaining charges in each node of the clocked power logic after a single clock operation.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: March 5, 2013
    Assignee: IUCF-HYU (Industry-University Cooperation Foundation Hanvang University)
    Inventors: Kim Dong Kyue, Choi Byong-Deok
  • APPARATUS FOR CLOCKED POWER LOGIC AGAINST POWER ANALYSIS ATTACK
    Publication number: 20120200313
    Abstract: A logic apparatus secure against a power analysis attack is disclosed. The logic apparatus may include a clocked power logic to recover and reuse at least a part of charges supplied during a single clock operation; a first device block connected to the clocked power logic to remove a parasitic capacitance difference in the clocked power logic, and a second device block to readjust remaining charges in each node of the clocked power logic after a single clock operation.
    Type: Application
    Filed: February 8, 2011
    Publication date: August 9, 2012
    Applicant: IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
    Inventors: Kim Dong Kyue, Choi Byong-Deok