Abstract: A solder mask manufacturing method adapted to apply a solder mask on a surface of a substrate of a circuit board, said surface is provided with a conductor pattern having an unsheltered portion and a sheltered portion which is covered by said solder mask. The method comprises the steps of: a) disposing a layer of semi-solid solder mask material having an expansion coefficient substantially the same as that of the substrate on the surface of said substrate to cover said copper conductor pattern, and a metal foil covering the material layer; b) applying pressure to the metal foil and applying baking treatment to cure the solder mask material in to solid; c) utilizing chemical solution and plasma etching to remove the metal foil and the solid solder mask material above the unsheltered portion of said copper conductor pattern respectively such that the unsheltered portion can be exposed; and d) using chemical solution to remove the residual metal foil.

Abstract: A printed circuit board having a permanent solder mask includes a substrate made of a glassfiber reinforced epoxy resin material. The top and bottom surfaces of the substrate are disposed thereon a conductive pattern respectively. An epoxy resin solder mask is coated on each surface of the substrate in such a way that the conductive pattern is divided into a sheltered portion covered by the solder mask and an unsheltered portion exposed outside. The solder mask also has an even and smooth outer surface with a micro-roughness ranging between 0.5 ?m˜10 ?m and an optimum thickness ranging between 2 ?m˜200 ?m.

Abstract: A solder mask manufacturing method adapted to apply a solder mask on a surface of a substrate of a circuit board, said surface is provided with a conductor pattern having an unsheltered portion and a sheltered portion which is covered by said solder mask. The method comprises the steps of: a) disposing a layer of semi-solid solder mask material having an expansion coefficient substantially the same as that of the substrate on the surface of said substrate to cover said copper conductor pattern, and a metal foil covering the material layer; b) applying pressure to the metal foil and applying baking treatment to cure the solder mask material in to solid; c) utilizing chemical solution and plasma etching to remove the metal foil and the solid solder mask material above the unsheltered portion of said copper conductor pattern respectively such that the unsheltered portion can be exposed; and d) using chemical solution to remove the residual metal foil.

Abstract: A printed circuit board having a permanent solder mask includes a substrate made of a glassfiber reinforced epoxy resin material. The top and bottom surfaces of the substrate are disposed thereon a conductive pattern respectively. An epoxy resin solder mask is coated on each surface of the substrate in such a way that the conductive pattern is divided into a sheltered portion covered by the solder mask and an unsheltered portion exposed outside. The solder mask also has an even and smooth outer surface with a micro-roughness ranging between 0.5 &mgr;m˜10 &mgr;m and an optimum thickness ranging between 2 &mgr;m˜200 &mgr;m.

Abstract: A printed circuit board having a permanent solder mask includes a substrate made of a glassfiber reinforced epoxy resin material. The top and bottom surfaces of the substrate are disposed thereon a conductive pattern respectively. An epoxy resin solder mask is coated on each surface of the substrate in such a way that the conductive pattern is divided into a sheltered portion covered by the solder mask and an unsheltered portion exposed outside. The solder mask also has an even and smooth outer surface with a micro-roughness ranging between 0.5 &mgr;m˜10 &mgr;m and an optimum thickness ranging between 2 &mgr;m˜200 &mgr;m.

Abstract: A printed circuit board comprises a substrate with a conductor pattern thereon. The conductor pattern is composed of a plurality of traces in a specific layout. The conductor pattern has first sections where adapt to let current flowing through and second sections electrically connected with the first sections respectively. The first sections of the conductor pattern have plating portions for providing connecting layers thereon, and a solder mask is provided on the substrate. The solder mask shelters the conductor pattern but exposes the connecting layers on the plating portions of the first sections of the conductor pattern. The solder mask has apertures at where relate to the second sections of the conductor pattern.

Abstract: A wire-bonded chip on board package has a substrate including a first resin. A solder mask made of a second resin having a thermal expansion coefficient identical to that of the first resin of the substrate is disposed on the top surface of the substrate such that it has a smooth outer surface and some openings to expose the respective areas of the conductive patterns on the top surface. An IC chip with an inactive side thereof tightly attaches to the outer surface of the solder mask. Wire bonds electrically connect the contact pads formed on an active side of the IC chip to the conductive patterns of the top surface. A molding material encapsulates the chip, the wire bonds and the substrate top surface.

Abstract: A flip chip package has a substrate made of a material including an epoxy resin. A solder mask is one layer of an epoxy resin disposed on the top surface of the substrate. The solder mask has a smooth outer surface and a plurality of opening to expose the conductive patterns formed on the top surface. An IC chip includes an active side having a plurality of electrical contact pads. A plurality of solder bumps, each bump is formed on a respective one of the plurality of contact pads on the IC chip. The active side of the IC chip is tightly attached to the outer surface of the solder mask such that after a soldering process each said bump has a remainder completely received in a respective one of the opening of the solder mask and connected to the conductive patterns therein.

Abstract: An electrode device for a plasma processing system is presented. The electrode device is installed in a chamber of the plasma processing system. The electrode device comprises a plurality of electrode assemblies. Each electrode assembly has at least one first electrode and at least one second electrode. The first electrode is connected to a first output of a power supply, and the second electrode, connected to a second output of the power supply. Each electrode assembly is spaced apart from each other so as to generate plasma in the chamber. The electrode assembly comprises at least two electrodes (the first electrode and the second electrode) with shorter distance between the electrodes, and the type of the power supply can be altered to increase the electric field intensity, the hollow cathode effect, plasma density and uniformity. The electrode device can raise the efficiency in processing the object, and increase the uniformity of the electric field and upgrade the quality of the object.

Abstract: A printed circuit board having a permanent solder mask includes a substrate made of a glassfiber reinforced epoxy resin material. The top and bottom surfaces of the substrate are disposed thereon a conductive pattern respectively. An epoxy resin solder mask is coated on each surface of the substrate in such a way that the conductive pattern is divided into a sheltered portion covered by the solder mask and an unsheltered portion exposed outside. The solder mask also has an even and smooth outer surface with a micro-roughness ranging between 0.5 &mgr;m˜10 &mgr;m and an optimum thickness ranging between 2 &mgr;m˜200 &mgr;m.

Abstract: A solder mask manufacturing method adapted to apply a solder mask on a surface of a substrate of a circuit board, said surface is provided with a conductor pattern having an unsheltered portion and a sheltered portion which is covered by said solder mask. The method comprises the steps of: a) disposing a layer of semi-solid solder mask material having an expansion coefficient substantially the same as that of the substrate on the surface of said substrate to cover said copper conductor pattern, and a metal foil covering the material layer; b) applying pressure to the metal foil and applying baking treatment to cure the solder mask material in to solid; c) utilizing chemical solution and plasma etching to remove the metal foil and the solid solder mask material above the unsheltered portion of said copper conductor pattern respectively such that the unsheltered portion can be exposed; and d) using chemical solution to remove the residual metal foil.

Abstract: A solder mask manufacturing method adapted to apply a solder mask on a surface of a substrate of a circuit board, said surface is provided with a conductor pattern having an unsheltered portion and a sheltered portion which is covered by said solder mask. The method comprises the steps of: a) disposing a layer of semi-solid solder mask material having an expansion coefficient substantially the same as that of the substrate on the surface of said substrate to cover said copper conductor pattern, and a metal foil covering the material layer; b) applying pressure to the metal foil and applying baking treatment to cure the solder mask material in to solid; c) utilizing chemical solution and plasma etching to remove the metal foil and the solid solder mask material above the unsheltered portion of said copper conductor pattern respectively such that the unsheltered portion can be exposed; and d) using chemical solution to remove the residual metal foil.

Abstract: One or more through holes are formed by a process in a printed circuit board substrate formed of a resinous dielectric sheet and a conductive layer covering one surface of the dielectric sheet. The process involves the forming by laser one or more cavities on other surface of the dielectric sheet such that the cavities penetrate only the dielectric sheet, without penetrating the conductive layer. Both surfaces of the dielectric sheet are coated with a liquid photoresist layer such that the cavities are filled with the photoresist. A plurality of small areas are formed by photolithography on the surface which is covered with the conductive layer. The small areas are corresponding in location and shape to the cavities which may be of any shape. The small areas are stripped of the conductive, layer by etching before the cavities are stripped of the photoresist. The through holes are thus formed in the small areas defined by the cavities.

Abstract: A solder mask manufacturing method adapted to apply a solder mask on a surface of a substrate of a circuit board, said surface is provided with a conductor pattern having an unsheltered portion and a sheltered portion which is covered by said solder mask. The method comprises the steps of: a) disposing a layer of semi-solid solder mask material having an expansion coefficient substantially the same as that of the substrate on the surface of said substrate to cover said copper conductor pattern, and a metal foil covering the material layer; b) applying pressure to the metal foil and applying baking treatment to cure the solder mask material in to solid; c) utilizing chemical solution and plasma etching to remove the metal foil and the solid solder mask material above the unsheltered portion of said copper conductor pattern respectively such that the unsheltered portion can be exposed; and d) using chemical solution to remove the residual metal foil.

Abstract: A packaging method for integrated circuit device, which is fit to apply flip chip bonding technique to a leadframe-type chip carrier. The packaging method will not increase the difficulty in assembly of the integrated circuit chip with the leadframe and is able to ensure that the integrated circuit chip be assembled with the lead fingers of the leadframe without false soldering. Also, the packaging method can achieve less inductance of the transmission line and faster transmission speed. In addition, the cost required of the packaging method can be much lower than that for the organic or ceramic base board.

Abstract: A hole is generated in a substrate. A chip is connected to the substrate by using the chip receiving area of the substrate by using flip chip assembly. The hole is aligned to the chip receiving area of the substrate. Then, a underfill process is performed such that the space between the chip and the substrate will be encapsulated using liquid capsulated material. The liquid capsulated material is injected into the hole from the back side surface of the substrate to the front side surface of the substrate.

Abstract: A chip scale packaging method is used to package a single-sided substrate and one or more semiconductor chips. The nonconductive surface of the substrate is provided with one or more chip-implanting adhesive areas by stenciling. The adhesive areas are provided with one or more through holes. The chips are implanted in the adhesive areas of the substrate such that the active surface of each chip is in contact with the adhesive area, and that the bonding pads of the active surface of the chip are corresponding in location to the through holes. Upon completion of the chip implantation, the substrate and the implanted chips are heated under pressure before the bonding pads are connected with the conductive surface of the substrate by a plurality of metal bonding wires. The chips and the through holes are subsequently provided with a passivation layer. Finally, the conductive surface of the substrate is implanted with a plurality of spherical bonding points in a grid array fashion.