Patents by Inventor Choon Sik Oh

Choon Sik Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7176722
    Abstract: A low-power, high-performance inverter circuit comprises first and second inverter circuit portions. The first portion comprises a first inverter, including a first pull-up element and a first pull-down element, for inverting an input signal, a first switching element connected between the first pull-down element and ground for switching the first inverter, and a first diode connected between the first pull-down element and ground in parallel with the first switching element. The second portion comprises a second inverter, including a second pull-up element and a second pull-down element, for inverting an input signal, a second switching element connected between the second pull-up element and a supply voltage terminal for switching the second inverter, and a second diode connected between the second pull-up element and the supply voltage terminal in parallel with the second switching element. An output of the first portion is connected to an input of the second portion.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: February 13, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung Kye Park, Choon Sik Oh
  • Patent number: 6255144
    Abstract: Disclosed is a repairing fuse for semiconductor devices and fabrication therefor. The repairing fuse has a first conducting film and a plurality of second conducting films wherein the first conducting film and the second conducting films are initially disconnected and mutually connected upon illumination of a laser beam so as to repair the semiconductor devices. In a contact hole which has a lower part narrower than its upper part, the first conducting film is formed having a connection to a bottom wire layer atop a semiconductor substrate. The contact hole is formed in an interlayer insulating film deposited on the wire layer. The second conducting films are disconnected with each other, each having an end point at a predetermined part on the slant wall the upper part of the contact hole. This novel fuse concept eliminates conventional problems, bringing a significant improvement into the simplification and yield of a repairing process.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: July 3, 2001
    Assignee: Hyundai Electronics Industries, Co., Ltd.
    Inventors: Bae Keun Jeon, Myeung Sik Chang, Choon Sik Oh, Sung Wook Park
  • Patent number: 5221853
    Abstract: Selective deposition of a refractory metal on a silicon substrate utilizing high temperatures and a silane reduction process in which the flow rate ratio of silane to refractory metal halide gas is less than one. In a second embodiment, an additional layer of the refractory metal is deposited utilizing a hydrogen reduction of the metal halide gas at very high temperatures. In both embodiments, a refractory metal barrier layer may be provided by forming a self-aligned refractory metal silicide layer. Alternatively, a two layer self-aligned barrier is formed of a refractory metal silicide lower layer and a refractory metal nitride upper layer and the refractory metal is selectively deposited on the metal nitride.
    Type: Grant
    Filed: September 20, 1991
    Date of Patent: June 22, 1993
    Assignee: International Business Machines Corporation
    Inventors: Rajiv V. Joshi, Choon-Sik Oh, Dan Moy
  • Patent number: 5202287
    Abstract: Selective deposition of a refractory metal on a silicon substrate utilizing high temperatures and a silane reduction process in which the flow rate ratio of silane to refractory metal halide gas is less than one. In a second embodiment, an additional layer of the refractory metal is deposited utilizing a hydrogen reduction of the metal halide gas at very high temperatures. In both embodiments, a refractory metal barrier layer may be provided by forming a self-aligned refractory metal silicide layer. Alternatively, a two layer self-aligned barrier is formed of a refractory metal silicide lower layer and a refractory metal nitride upper layer and the refractory metal is selectively deposited on the metal nitride.
    Type: Grant
    Filed: January 6, 1992
    Date of Patent: April 13, 1993
    Assignee: International Business Machines Corporation
    Inventors: Rajiv V. Joshi, Choon-Sik Oh, Dan Moy
  • Patent number: 5084417
    Abstract: Selective deposition of a refractory metal on a silicon substrate utilizing high temperature and a silane reduction process in which the flow rate ratio of silane to refractory metal halide gas is less than one. In a second embodiment, an additional layer of the refractory metal is deposited utilizing a hydrogen reduction of the metal halide gas at very high temperatures. In both embodiments, a refractory metal barrier layer may be provided by forming a self-aligned refractory metal silicide layer. Alternatively, a two layer self-aligned barrier is formed of a refractory metal silicide lower layer and a refractory metal nitride upper layer and the refractory metal is selectively deposited on the metal nitride.
    Type: Grant
    Filed: March 13, 1989
    Date of Patent: January 28, 1992
    Assignee: International Business Machines Corporation
    Inventors: Rajiv V. Joshi, Choon-Sik Oh, Dan Moy