Patents by Inventor Choong-Heui Chung
Choong-Heui Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9780238Abstract: A metal-chalcogenide photovoltaic device includes a first electrode, a window layer spaced apart from the first electrode, and a photon-absorption layer between the first electrode and the window layer. The photon-absorption layer includes a metal-chalcogenide semiconductor. The window layer includes a layer of metal-oxide nanoparticles, and at least a portion of the window layer provides a second electrode that is substantially transparent to light within a range of operating wavelengths of the metal-chalcogenide photovoltaic device. A method of producing a metal-chalcogenide photovoltaic device includes providing a photovoltaic substructure, providing a solution of metal-oxide nanoparticles, and forming a window layer on the substructure using the solution of metal-oxide nanoparticles such that the window layer includes a layer of metal-oxide nanoparticles formed by a solution process.Type: GrantFiled: January 14, 2013Date of Patent: October 3, 2017Assignee: The Regents of the University of CaliforniaInventors: Yang Yang, Huanping Zhou, Bao Lei, Choong-Heui Chung, Brion P. Bob
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Patent number: 9560754Abstract: An electro-optic device includes a substructure, a layer of nanowires deposited on the substructure so as to form a network of nanowires having electrically connected junctions at overlapping nanowire portions and defining spaces void of the nanowires, and a plurality of electrically conducting and optically transparent nanoparticles disposed to at least partially fill a plurality of the spaces to provide additional electrically conducting pathways for the network of nanowires across the spaces. The network of nanowires and the plurality of electrically conducting and optically transparent nanoparticles form at least a portion of an optically transparent electrode of the electro-optic device.Type: GrantFiled: October 15, 2012Date of Patent: January 31, 2017Assignee: THE JOHNS HOPKINS UNIVERSITYInventors: Yang Yang, Choong-Heui Chung, Rui Zhu, Tze-Bin Song
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Publication number: 20150349157Abstract: Provided is a thin film solar cell including: a substrate on which a rear surface electrode is formed; a light absorbing layer, which is a compound semiconductor, positioned on the rear surface electrode; and a composite layer positioned on the light absorbing layer and contacting the light absorbing layer, wherein the composite layer includes: a conductive mesh; and a semiconductor material filled in at least an empty space of the conductive mesh.Type: ApplicationFiled: May 14, 2015Publication date: December 3, 2015Inventor: Choong-Heui Chung
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Publication number: 20140326311Abstract: A metal-chalcogenide photovoltaic device includes a first electrode, a window layer spaced apart from the first electrode, and a photon-absorption layer between the first electrode and the window layer. The photon-absorption layer includes a metal-chalcogenide semiconductor. The window layer includes a layer of metal-oxide nanoparticles, and at least a portion of the window layer provides a second electrode that is substantially transparent to light within a range of operating wavelengths of the metal-chalcogenide photovoltaic device. A method of producing a metal-chalcogenide photovoltaic device includes providing a photovoltaic substructure, providing a solution of metal-oxide nanoparticles, and forming a window layer on the substructure using the solution of metal-oxide nanoparticles such that the window layer includes a layer of metal-oxide nanoparticles formed by a solution process.Type: ApplicationFiled: January 14, 2013Publication date: November 6, 2014Applicant: The Regents of the University of CaliforniaInventors: Yang Yang, Huanping Zhou, Bao Lei, Choong-Heui Chung, Brion P. Bob
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Publication number: 20140290987Abstract: An electro-optic device includes a substructure, a layer of nanowires deposited on the substructure so as to form a network of nanowires having electrically connected junctions at overlapping nanowire portions and defining spaces void of the nanowires, and a plurality of electrically conducting and optically transparent nanoparticles disposed to at least partially fill a plurality of the spaces to provide additional electrically conducting pathways for the network of nanowires across the spaces. The network of nanowires and the plurality of electrically conducting and optically transparent nanoparticles form at least a portion of an optically transparent electrode of the electro-optic device.Type: ApplicationFiled: October 15, 2012Publication date: October 2, 2014Applicant: The Regents of the University of CaliforniaInventors: Yang Yang, Choong-Heui Chung, Rui Zhu, Tze-Bin Song
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Patent number: 7642143Abstract: Provided are a method of fabricating a multilayered thin film transistor using a plastic substrate and an active matrix display device including the thin film transistor fabricated by the method. The method includes: preparing a substrate formed of plastic; forming a buffer insulating layer on the plastic substrate; forming a silicon layer on the buffer insulating layer; patterning the silicon layer to form an active layer; forming a gate insulating layer on the active layer; stacking a plurality of gate metal layers on the gate insulating layer; patterning the plurality of gate metal layers; and etching a corner region of the lowest gate metal layer formed on the gate insulating layer of the patterned gate metal layers. Accordingly, a gate metal is formed which includes a multilayered gate metal layer and has an etched corner region, thereby reducing an electric field of the corner to reduce a leakage current of the TFT.Type: GrantFiled: October 11, 2007Date of Patent: January 5, 2010Assignee: Electronics and Telecommunications Research InstituteInventors: Yong Hae Kim, Choong Heui Chung, Jae Hyun Moon, Yoon Ho Song
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Publication number: 20080135837Abstract: Provided are a method of fabricating a multilayered thin film transistor using a plastic substrate and an active matrix display device including the thin film transistor fabricated by the method. The method includes: preparing a substrate formed of plastic; forming a buffer insulating layer on the plastic substrate; forming a silicon layer on the buffer insulating layer; patterning the silicon layer to form an active layer; forming a gate insulating layer on the active layer; stacking a plurality of gate metal layers on the gate insulating layer; patterning the plurality of gate metal layers; and etching a corner region of the lowest gate metal layer formed on the gate insulating layer of the patterned gate metal layers. Accordingly, a gate metal is formed which includes a multilayered gate metal layer and has an etched corner region, thereby reducing an electric field of the corner to reduce a leakage current of the TFT.Type: ApplicationFiled: October 11, 2007Publication date: June 12, 2008Inventors: Yong Hae KIM, Choong Heui CHUNG, Jae Hyun MOON, Yoon Ho SONG
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Patent number: 7379149Abstract: Provided are a low temperature active matrix display device using a plastic substrate and method of fabricating the same. The low temperature active matrix display device includes: a plastic substrate; a reflection layer disposed on the plastic substrate; a buffer layer disposed on the reflection layer; a thin film transistor disposed on the buffer layer in a first region of the plastic substrate; an interlayer dielectric layer disposed on the thin film transistor; a capacitor disposed in a trench formed in a second region of the plastic substrate and having a first electrode connected to a source electrode and a drain electrode of the thin film transistor, the trench extending from the interlayer dielectric layer to the reflection layer; and a display device having one electrode connected to a second electrode of the capacitor.Type: GrantFiled: October 28, 2005Date of Patent: May 27, 2008Assignee: Electronics and Telecommunications Research InstituteInventors: Yong Hae Kim, Choong Heui Chung, Jin Ho Lee
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Patent number: 7309954Abstract: The present invention relates to a field emission display in which a gate plate having a gate hole and a gate electrode around the gate hole is formed between an anode plate having phosphor and a cathode plate having a field emitter and a control device for controlling field emission current, wherein the field emitter of the cathode plate is constructed to be opposite to the phosphor of the anode plate through the gate hole. According to the present invention, it is possible to significantly reduce the display row/column driving voltage by applying scan and data signals of the field emission display to the control device of each pixel, And the present invention is directed to improve the brightness of the field emission display in such a manner that the electric field necessary for field emission is applied through the gate electrode of the gate plate to freely control the distance between the anode plate and the cathode plate, so that a high voltage can be applied to the anode.Type: GrantFiled: December 23, 2003Date of Patent: December 18, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Yoon Ho Song, Chi Sun Hwang, Choong Heui Chung, Jin Ho Lee
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Patent number: 7045469Abstract: A method of forming a buffer dielectric film in a semiconductor device and a method of manufacturing a thin film transistor using the same are disclosed.Type: GrantFiled: October 2, 2003Date of Patent: May 16, 2006Assignee: Electronics and Telecommunications Research InstituteInventors: Choong Yong Sohn, Yong Hae Kim, Jin Ho Lee, Young Wook Ko, Choong Heui Chung
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Patent number: 6970149Abstract: An active matrix organic light emitting diode display panel circuit capable of reducing current and brightness nonuniformities between pixels by including a threshold voltage compensation circuit block between a data line and the pixels is provided. The threshold voltage of a video signal loaded in a data line is compensated for while the video signal passes through the threshold voltage compensation circuit block and then provided to a driving transistor of the pixels. One threshold voltage compensation circuit block is connected commonly to a plurality of pixels, rather than be connected to every pixel, so that threshold voltage compensation can be achieved for high-quality, large-sized displays, without increasing the number of transistors for the pixels.Type: GrantFiled: December 31, 2002Date of Patent: November 29, 2005Assignee: Electronics and Telecommunications Research InstituteInventors: Choong-heui Chung, Chi-sun Hwang, Yoon-ho Song, Jin-ho Lee
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Patent number: 6958499Abstract: Provided is a field emission device having a mesh gate. The object of this research is to provide a field emission display (FED) using a triode field emission device for preventing increase of operation voltage, and securing high concentration of electron beams. The operation properties of the FED is different based on a structure of an extraction electrode. In this research, the extraction electrode is formed on the electron emitting source and it has a plurality of openings corresponding to the locations of carbon nanotube mixture. The concentration of the electron beams is raised and leakage current is suppressed by using an insulating mesh gate plate. The upper part of the openings has a smaller diagram than the lower part. The high concentration of electron beams and little leakage current can be generated by adding auxiliary electrodes or optimizing the shape of electrodes.Type: GrantFiled: September 30, 2003Date of Patent: October 25, 2005Assignee: Electronics and Telecommunications Research InstituteInventors: Chi-Sun Hwang, Yoon-Ho Song, Bong-Chul Kim, Choong-Heui Chung
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Publication number: 20040160161Abstract: The present invention relates to a field emission display in which a gate plate having a gate hole and a gate electrode around the gate hole is formed between an anode plate having phosphor and a cathode plate having a field emitter and a control device for controlling field emission current, wherein the field emitter of the cathode plate is constructed to be opposite to the phosphor of the anode plate through the gate hole.Type: ApplicationFiled: December 23, 2003Publication date: August 19, 2004Inventors: Yoon Ho Song, Chi Sun Hwang, Choong Heui Chung, Jin Ho Lee
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Publication number: 20040121529Abstract: A method of forming a buffer dielectric film in a semiconductor device and a method of manufacturing a thin film transistor using the same are disclosed.Type: ApplicationFiled: October 2, 2003Publication date: June 24, 2004Inventors: Choong Yong Sohn, Yong Hae Kim, Jin Ho Lee, Young Wook Ko, Choong Heui Chung
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Publication number: 20040115870Abstract: Provided is a field emission device having a mesh gate. The object of this research is to provide a field emission display (FED) using a triode field emission device for preventing increase of operation voltage, and securing high concentration of electron beams. The operation properties of the FED is different based on a structure of an extraction electrode. In this research, the extraction electrode is formed on the electron emitting source and it has a plurality of openings corresponding to the locations of carbon nanotube mixture. The concentration of the electron beams is raised and leakage current is suppressed by using an insulating mesh gate plate. The upper part of the openings has a smaller diagram than the lower part. The high concentration of electron beams and little leakage current can be generated by adding auxiliary electrodes or optimizing the shape of electrodes.Type: ApplicationFiled: September 30, 2003Publication date: June 17, 2004Inventors: Chi-Sun Hwang, Yoon-Ho Song, Bong-Chul Kim, Choong-Heui Chung
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Publication number: 20040051685Abstract: An active matrix organic light emitting diode display panel circuit capable of reducing current and brightness nonuniformities between pixels by including a threshold voltage compensation circuit block between a data line and the pixels is provided. The threshold voltage of a video signal loaded in a data line is compensated for while the video signal passes through the threshold voltage compensation circuit block and then provided to a driving transistor of the pixels. One threshold voltage compensation circuit block is connected commonly to a plurality of pixels, rather than be connected to every pixel, so that threshold voltage compensation can be achieved for high-quality, large-sized displays, without increasing the number of transistors for the pixels.Type: ApplicationFiled: December 31, 2002Publication date: March 18, 2004Inventors: Choong-Heui Chung, Chi-Sun Hwang, Yoon-Ho Song, Jin-Ho Lee
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Patent number: 6410344Abstract: A ferroelectric random access memory (FeRAM) device including an active matrix provided with a transistor and diffusion regions, a first capacitor structure formed on a portion of the active matrix and provided with a first capacitor thin film made of strontium bismuth tantalate (SBT), a second capacitor structure formed on a remaining portion of the active matrix and provided with a second capacitor thin film made of lead zirconate titanate (PZT), and a metal interconnection formed on the first and the second capacitor structures, thereby electrically connecting the first and the second capacitor structures to one of the diffusion regions.Type: GrantFiled: December 14, 2000Date of Patent: June 25, 2002Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Choong-Heui Chung