Patents by Inventor Chorng-Sii Hwang

Chorng-Sii Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Resolution-enhancing CMOS all-digital pulse-mixing method and device thereof
    Patent number: 10141919
    Abstract: A CMOS all-digital pulse-mixing device includes a plurality of homogeneous logic elements serially connected to form a basic element sequence, an odd-positioned element parallel connection set and an even-positioned element parallel connection set. The basic element sequence includes odd combination positions and even combination positions. The odd-positioned element parallel connection set serially connects with one of the odd combination positions and the even-positioned element parallel connection set serially connects with one of the even combination positions. The odd-positioned element parallel connection set and the even-positioned element parallel connection set are provided to stretch or shrink a pulse mixture, which is distinguished from a conventional full-customized pulse-mixing device.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: November 27, 2018
    Assignee: National Kaohsiung First University of Science and Technology
    Inventors: Chun-Chi Chen, Che-Hsun Chu, Chorng-Sii Hwang
  • Resolution-Enhancing CMOS All-Digital Pulse-Mixing Method and Device Thereof
    Publication number: 20170250683
    Abstract: A CMOS all-digital pulse-mixing device includes a plurality of homogeneous logic elements serially connected to form a basic element sequence, an odd-positioned element parallel connection set and an even-positioned element parallel connection set. The basic element sequence includes odd combination positions and even combination positions. The odd-positioned element parallel connection set serially connects with one of the odd combination positions and the even-positioned element parallel connection set serially connects with one of the even combination positions. The odd-positioned element parallel connection set and the even-positioned element parallel connection set are provided to stretch or shrink a pulse mixture, which is distinguished from a conventional full-customized pulse-mixing device.
    Type: Application
    Filed: May 12, 2017
    Publication date: August 31, 2017
    Inventors: Chun-Chi Chen, Che-Hsun Chu, Chorng-Sii Hwang
  • Internal offset-canceled phase locked loop-based deskew buffer
    Patent number: 6346838
    Abstract: A phase lock loop-based deskew buffer circuit includes a fixed delay element to delay a feedback signal and to generate a first signal from the feedback signal. A delay locked loop (DLL) generates a second signal from a reference signal and compares a phase of the feedback signal with a phase of the reference signal. The DLL is capable of keeping a relative timing of the first and second signals constant while adjusting the feedback signal to be in phase with the reference signal. This results in loop stability and cancellation of internal offset.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: February 12, 2002
    Assignee: Taiwan Semiconductor Manufacturing Corporation
    Inventors: Chorng-Sii Hwang, Wen-Wel Chiu