Abstract: An alignment mark and an exposure alignment system and method using the alignment mark for aligning wafers are described. The alignment mark is formed of a plurality of mesa or trench type unit marks that are aligned in an inline pattern within an underlying layer under a layer to which a chemical mechanical polishing process is applied to form an alignment signal during an alignment process, thereby preventing a dishing phenomenon caused by the chemical mechanical process.

Abstract: An alignment mark and an exposure alignment system and method using the alignment mark for aligning wafers are described. The alignment mark is formed of a plurality of mesa or trench type unit marks that are aligned in an inline pattern within an underlying layer under a layer to which a chemical mechanical polishing process is applied to form an alignment signal during an alignment process, thereby preventing a dishing phenomenon caused by the chemical mechanical process.

Abstract: An alignment mark and an exposure alignment system and method using the alignment mark for aligning wafers are described. The alignment mark is formed of a plurality of mesa or trench type unit marks that are aligned in an inline pattern within an underlying layer under a layer to which a chemical mechanical polishing process is applied to form an alignment signal during an alignment process, thereby preventing a dishing phenomenon caused by the chemical mechanical process.

Abstract: An alignment mark and an exposure alignment system and method using the alignment mark for aligning wafers are described. The alignment mark is formed of a plurality of mesa or trench type unit marks that are aligned in an inline pattern within an underlying layer under a layer to which a chemical mechanical polishing process is applied to form an alignment signal during an alignment process, thereby preventing a dishing phenomenon caused by the chemical mechanical process.

Abstract: A reticle for fabricating a semiconductor device, wherein alignment-marks useful to examine a pattern mistake are formed upon a scribe line, the alignment-marks having pairs of adjoining primary and secondary measurement patterns. Each primary measurement pattern includes a rectangular pattern provided on a rectangular plate, and a rod-shaped pattern separately formed along the sides of the rectangular pattern. Each secondary measure pattern is fitted into the rectangular pattern of the respective primary measure pattern in case that the secondary measure pattern is overlapped with the primary measure pattern, to thereby permit the examination of position of the secondary measurement pattern relative to the primary measurement pattern.

Abstract: A semiconductor wafer cleaning apparatus having an edge rinse member adapted for rinsing edges of a semiconductor wafer and having a moving member adapted to permit horizontally movement of the edge rinse member, wherein the apparatus is adapted to minimize or prevent an upper surface of the wafer from being stained with pollutants during rinsing. The wafer cleaning apparatus minimizes or prevents rebounding of a rinse solution containing particles from the inside wall of a bowl during rinsing of the edges of a semiconductor wafer.