Abstract: Among others, the present invention provides micro-devices for detecting or treating a disease, each comprising a first sorting unit capable of detecting a property of the biological subject at the microscopic level and sorting the biological subject by the detected property; a first detection unit capable of detecting the same or different property of the sorted biological subject at the microscopic level; and a first layer of material having an exterior surface and an interior surface, wherein the interior surface defines a first channel in which the biological subject flows from the first sorting unit to the first detection unit.

Abstract: Among others, the present invention provides apparatus for detecting a disease, comprising a system delivery biological subject and a probing and detecting device, wherein the probing and detecting device includes a first micro-device and a first substrate supporting the first micro-device, the first micro-device contacts a biologic material to be detected and is capable of measuring at the microscopic level an electric, magnetic, electromagnetic, thermal, optical, acoustical, biological, chemical, physical, or mechanical property of the biologic material.

Abstract: The invention provides decomposing apparatus which comprises a first sub-component and a first micro device comprising a decomposable material, wherein the sub-component comprises a drug, a medical kit, a micro-disease detection system, or an auto-navigation system. Also within the invention are methods for fabricating such apparatus.

Abstract: Among others, the present invention provides fabricated micro-devices for application in live biological systems, each comprising (a) an outer membrane, (b) a micro-mechanical, micro-chemical, micro-chemical-mechanical, micro-optical, micro-acoustical, micro-biological, micro-bio-chemical, micro-bio-chemical-mechanical, micro-electro-bio-chemical-mechanical, micro-electro-chemical-mechanical, micro-electro-bio-chemical-mechanical, micro-electro-mechanical, micro-electromagnetic-mechanical, micro-acoustic-mechanical, and micro-superconducting-mechanical properties, and (c) having a size as defined by the outer membrane ranging from 1 angstrom to 5 millimeters; and methods of using such fabricated micro-devices.

Abstract: The present invention provides novel medical instruments and methods for fabricating them by using nano-technology processes.

Abstract: A drug delivery method for effective drug application is disclosed in this invention. In this method, a micro-carrier delivers an encapsulated, desired drug directly to targeted sites without significant interactions with other components in the biological system in the pathway. In one embodiment, a micro-carrier containing encapsulated drug is first delivered to the general area for treatment. It then scans the area and selectively attaches itself the cell site or organ location to be treated. Finally, the desired drug contained in the micro-carrier is released to the attached cell or organ. In another embodiment, a micro-device is first used to process the general area to be treated to enhance differentiation in properties (such as surface charge) between healthy cells and unhealthy cells (such as cancer cells). Drug encapsulated in the micro-carrier is next applied to preferentially attach onto the targeted sites (such as cancer cell sites) to be treated.

Abstract: Micro-devices for biological applications are disclosed herein. The types of micro-devices include, but are not limited to, micro-mechanical, micro-chemical, micro-chemical-mechanical, micro-electro-mechanical, micro-electro-chemical-mechanical, micro-bio-electro-chemical-mechanical, micro-optical, micro-acoustical, micro-biological, micro-electromechanical, micro-electromagnetic mechanical, micro-acoustic-mechanical and micro-superconducting mechanical devices and various combinations thereof. Such devices can range from a single material with desired properties to a complex unit with multiple materials and sub-unit or units integrated onto it capable of carrying out multiple functions. Such devices are designed to carry out a range of functions in biological applications including but not limited to scanning and testing for diseased cells and organs, treating diseases, and preventing diseases in live biological systems.

Abstract: A method for fabricating an integrated circuit device. A plurality of MOS transistor devices are formed overlying a semiconductor substrate. Each of the MOS transistor devices includes a nitride cap and nitride sidewall spacers. An interlayer dielectric layer is formed overlying the plurality of MOS transistor devices. A portion of the interlayer dielectric material is removed to expose at least portions of three MOS transistor devices and expose at least three regions between respective MOS transistor devices. The method deposits polysilicon fill material overlying the exposed three regions and overlying the three MOS transistor devices. The method performs a chemical mechanical planarization process on the polysilicon material to reduce a thickness of the polysilicon material exposing a portion of the interlayer dielectric material until the cap nitride layer on each of the MOS transistors has been exposed using the cap nitride layer as a polish stop layer.

Abstract: A method for chemical mechanical polishing of mirror structures. Such mirror structures may be used for displays (e.g., LCOS, DLP), optical devices, and the like. The method includes providing a semiconductor substrate, e.g., silicon wafer. The method forms a first dielectric layer overlying the semiconductor substrate and forms an aluminum layer overlying the dielectric layer. The aluminum layer has a predetermined roughness of greater than 20 Angstroms RMS. The method patterns the aluminum layer to expose portions of the dielectric layer. The method includes forming a second dielectric layer overlying the patterned aluminum layer and exposed portions of the dielectric layer. The method removes a portion of the second dielectric layer.

Abstract: A method for manufacturing an LCOS device includes forming an interlayer dielectric layer overlying a surface region of a substrate. The interlayer dielectric layer is patterned to form a plurality of recessed regions. Each of the recessed regions corresponds to a pixel element for a LCOS device and is isolated by a portion of dielectric material defining a border for each of the recessed regions. An aluminum material or aluminum alloy material is deposited within each of the recessed regions. A photomask is formed overlying the aluminum material and patterned to expose the recessed regions while protecting the border regions. Exposed regions of the aluminum material is removed while the border regions with the photomask is protected. The method continues the removing until the aluminum material has been removed to a vicinity of an upper region of the border regions. The patterned photomask is stripped to expose protruding aluminum material.

Abstract: A method for chemical mechanical polishing of mirror structures. The method includes providing a semiconductor substrate, e.g., silicon wafer. The method includes forming a first dielectric layer overlying the semiconductor substrate and forming an aluminum layer overlying the first dielectric layer, the aluminum layer having an upper surface with a predetermined roughness of greater than 20 Angstroms RMS. The method also includes processing regions overlying the upper surface of the aluminum layer using a touch polishing process to reduce a surface roughness of the upper surface of aluminum layer to less than 5 Angstroms to form a mirror surface on the aluminum layer. Preferably, a protective layer is formed overlying the mirror surface on the aluminum layer.

Abstract: Methods for manufacturing substrates with difficult to polish features using reverse mask etching and chemical mechanical planarization techniques.

Abstract: A process for fabricating micro-acousto-optic modulators using microelectronics fabrication technology. First, a set of trenches is etched into a substrate. Then, a transducer material is deposited into these trenches, followed by removal of any transducer material located above the surface of the substrate. Next, a second set of trenches is etched on both sides of the transducer material, between the transducer material and the substrate. Then, an electrode material is deposited into the second set of trenches. Finally, any electrode material located above the surface of the substrate is removed such that the surface of the substrate is co-planar with the electrode and transducer materials.

Abstract: A method for fabricating a region of low dielectric constant between metal layers of a substrate, such as an integrated circuit, that eliminate or minimize the problems associated with the existing and future low-k materials and processes. The method utilizes a sacrificial layer or an ultra low-k layer to form a major, but not entire, portion of the dielectric layer between the metal layers, using innovative integration schemes and CMP processes.

Abstract: A process for fabricating micro-acousto-optic modulators using microelectronics fabrication technology. First, a set of trenches is etched into a substrate. Then, a transducer material is deposited into these trenches, followed by removal of any transducer material located above the surface of the substrate. Next, a second set of trenches is etched on both sides of the transducer material, between the transducer material and the substrate. Then, an electrode material is deposited into the second set of trenches. Finally, any electrode material located above the surface of the substrate is removed such that the surface of the substrate is co-planar with the electrode and transducer materials.

Abstract: Methods for manufacturing substrates with difficult to polish features using reverse mask etching and chemical mechanical planarization techniques.

Abstract: Conductive plugs (28) are formed in a semiconductor device (10) using a chemical mechanical polishing (CMP) process. A blanket conductive layer (26), for example of tungsten, is deposited in a plug opening (24). The conductive layer is polished back by CMP using a slurry comprised of either copper sulfate (CuSO.sub.4) or copper perchlorate [Cu(ClO.sub.4).sub.2 ] and an abrasive, such as alumina or silica, and water. In another embodiment, a CMP process using such slurries may be used to form conductive interconnects (50) in a semiconductor device (40).

Abstract: A mold is used to form a polishing pad, wherein the surface of the polishing side of the polishing pad is determined by a primary surface of the mold. Features along the polishing side of a polishing pad may take any one of several different shapes. Channels along the polishing side of the polishing pad allow a smaller pore size to be used. The mold allows more control over the surface of the polishing side, which in turn give more control over polishing characteristics.

Abstract: Disclosed is a method for planarizing a metal surface and forming coplanar metal and dielectric layer surfaces with a minimized degree of dishing (metal recess in an oxide cavity or trough) which results from the uneven polishing with a polishing pad. A cavity is formed in a substrate material, such as oxide, and a layer of conductive material such as metal is formed over the cavity and other surfaces of the substrate. Next, a protective layer of material such as silicon dioxide, borophosphosilicate glass (BPSG), silicon nitride, or tetraethylorthosilicate (TEOS), or any insulator or conductor which can be removed at a slower rate than the conductive layer, is formed over the metal surface, the protective layer being not as easily polished as the metal in a chemical mechanical polishing (CMP) process optimized for metal polishing. A first CMP process removes a portion of the protective layer from the underlying metal overburden.

Abstract: A method for forming conductive plugs within an insulation material is described. The inventive process results in a plug of a material such as tungsten which is more even with the insulation layer surface than conventional plug formation techniques. Conventional processes result in recessed plugs which are not easily or reliably coupled with subsequent layers of sputtered aluminum or other conductors. The inventive process uses a two-step chemical mechanical planarization technique. An insulation layer with contact holes is formed, and a metal layer is formed thereover. A polishing pad rotates against the wafer surface while a slurry selective to the metal removes the metal overlying the wafer surface, and also recesses the metal within the contact holes due to the chemical nature and fibrous element of the polishing pad. A second CMP step uses a slurry having an acid or base selective to the insulation material to remove the insulator from around the metal.