Patents by Inventor Christian Borntraeger

Christian Borntraeger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11831755
    Abstract: A method, a computer system, and a computer program product for cryptography are provided. A guest virtual server registers with a trusted hypervisor by using guest credentials. A guest wrapping key associated with the guest credentials is generated. A satellite virtual server instance that shares a master key with the virtual guest server is generated in the trusted hypervisor. A copy of the guest wrapping key is passed to the satellite virtual server instance. A random guest key is wrapped with the guest wrapping key, thereby producing a wrapped guest key. The wrapped guest key is rewrapped with the master key to form a protected guest key.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: November 28, 2023
    Assignee: International Business Machines Corporation
    Inventors: Reinhard Theodor Buendgen, Christian Borntraeger
  • Patent number: 11675899
    Abstract: Aspects include circuitry that includes a first global generation counter (GGC) that is increased upon decoding of a branch instruction and a second GGC that is increased upon a completion of the branch instruction. Upon a triggered rollback, the first GGC is reset. The circuitry also includes a generation tag memory associated with a register that receives loads during a side-channel attacks which is set to the first GGC upon a first load, and a determination unit to determine, for a second load from an address depending on the register of the first load, a generation tag value associated with the register of the second load as a function of the first GGC, the second GGC, and the generation tag value associated with the register of the first load. A wait queue is configured to block the second load, if the generation tag is larger than the second GGC.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: June 13, 2023
    Assignee: International Business Machines Corporation
    Inventors: Christian Borntraeger, Jonathan D. Bradbury, Martin Recktenwald, Anthony Saporito
  • Publication number: 20230176901
    Abstract: A computer-implemented method, a computer system and a computer program product operate a secure code segment on a processor core of a processing unit, wherein the processing unit is configured with at least one processor core. The method comprises requesting exclusive secure execution of a secure code segment of the program code on the at least one processor core. The method also comprises setting the at least one processor core to exclusive secure execution for the secure code segment. The method further comprises executing the secure code segment on the at least one processor core uninterruptably. In addition, the method comprises wiping an architected state and a non-architected state of a physical processor core from the at least one processor core. Lastly, the method comprises setting the at least one processor core to the first execution mode for program code on the at least one processor core.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 8, 2023
    Inventors: Cedric Lichtenau, Jakob Christopher Lang, Eberhard Pasch, Christian Borntraeger
  • Publication number: 20230177143
    Abstract: A computer-implemented method, a computer system and a computer program product operate a secure code segment on a processor core of a processing unit, wherein the processing unit is configured with at least one processor core. The method comprises requesting exclusive secure execution of a secure code segment of the program code on the at least one processor core. The method also comprises setting the at least one processor core to exclusive secure execution for the secure code segment. The method further comprises executing the secure code segment on the at least one processor core uninterruptably. In addition, the method comprises wiping an architected state and a non-architected state of a physical processor core from the at least one processor core. Lastly, the method comprises setting the at least one processor core to the first execution mode for program code on the at least one processor core.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 8, 2023
    Inventors: Cedric Lichtenau, Jakob Christopher Lang, Eberhard Pasch, Christian Borntraeger
  • Patent number: 11669462
    Abstract: According to one or more embodiments of the present invention, a computer implemented method includes receiving, at a secure interface control of a computer system, an access request for a data structure related to a secure entity in a secure domain of the computer system. The secure interface control can check for a virtual storage address associated with a location of the data structure. The secure interface control can request an address translation using a virtual address space of a non-secure entity of the computer system based on determining that the location of the data structure is associated with the virtual storage address. The secure interface control can access the data structure based on a result of the address translation.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: June 6, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claudio Imbrenda, Christian Borntraeger, Lisa Cranton Heller, Fadi Y. Busaba, Jonathan D. Bradbury
  • Publication number: 20230083083
    Abstract: At least one request to store diagnostic state of a virtual machine is obtained. Based on obtaining the at least one request, a store of diagnostic state of the virtual machine is performed to provide stored diagnostic state of the virtual machine. The performing the store includes encrypting the diagnostic state of the virtual machine that is unencrypted and being stored to prevent a reading of the diagnostic state of the virtual machine by an untrusted entity prior to encrypting the diagnostic state of the virtual machine that is unencrypted and being stored.
    Type: Application
    Filed: September 14, 2021
    Publication date: March 16, 2023
    Inventors: Jonathan D. Bradbury, Torsten Hendel, Reinhard Theodor Buendgen, Claudio Imbrenda, Christian Borntraeger, Janosch Andreas Frank
  • Publication number: 20230061511
    Abstract: A virtual machine is dispatched and based on the dispatch, a determination is made as to whether a select area of memory expected to be accessible to the virtual machine and used in communication between the virtual machine and an operating system is accessible to the virtual machine. Based on determining that the select area of memory is inaccessible to the virtual machine, virtual machine execution is exited with a select interception code.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Fadi Y. Busaba, Lisa Cranton Heller, Janosch Andreas Frank, Christian Borntraeger, Jonathan D. Bradbury
  • Patent number: 11593275
    Abstract: Operating system deactivation of write protection for a storage block is provided absent quiescing of processors in a multi-processor computing environment. The process includes receiving an address translation protection exception interrupt resulting from an attempted write access by a processor to a storage block, and determining by the operating system whether write protection for the storage block is active. Based on write protection for the storage block not being active, the operating system issues an instruction to clear or modify translation lookaside buffer entries of the processor associated with the storage block, absent waiting for an action by another processor of multiple processors of the computing environment, to facilitate write access to the storage block proceeding at the processor.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: February 28, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christine Michele Yost, Elpida Tzortzatos, Bruce Conrad Giamei, Timothy Slegel, Christian Borntraeger, Damian Osisek, Lisa Cranton Heller, Ute Gaertner
  • Publication number: 20230039894
    Abstract: Deferred reclaiming of secure guest resources within a computing environment is provided, which includes initiating, by a host of the computing environment, removal of a secure guest from the computing environment, while leaving one or more resources of the secure guest to be reclaimed asynchronous to the removal of the secure guest. The deferring also includes reclaiming the one or more secure guest resources asynchronous to the removal of the secure guest, where the one or more secure guest resources are available for reuse as the one or more secure guest resources are reclaimed asynchronous to the removal of the secure guest.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 9, 2023
    Inventors: Claudio IMBRENDA, Christian BORNTRAEGER, Janosch Andreas FRANK, Jonathan D. BRADBURY
  • Publication number: 20220382682
    Abstract: An instruction is provided to perform a reset address translation protection operation when executed. Executing the instruction includes determining, by a processor, that an address translation protection bit in a specified translation table entry associated with a storage block is to be reset. Based on determining that the address translation protection bit is to be reset, executing the instruction includes resetting the address translation protection bit to deactivate write protection for the storage block. The resetting is absent waiting for an action by one or more other processors of the computing environment.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Inventors: Bruce Conrad GIAMEI, Timothy SLEGEL, Christian BORNTRAEGER, Damian OSISEK, Lisa Cranton HELLER, Ute GAERTNER, Christine Michele YOST, Elpida TZORTZATOS
  • Publication number: 20220382683
    Abstract: Operating system deactivation of write protection for a storage block is provided absent quiescing of processors in a multi-processor computing environment. The process includes receiving an address translation protection exception interrupt resulting from an attempted write access by a processor to a storage block, and determining by the operating system whether write protection for the storage block is active. Based on write protection for the storage block not being active, the operating system issues an instruction to clear or modify translation lookaside buffer entries of the processor associated with the storage block, absent waiting for an action by another processor of multiple processors of the computing environment, to facilitate write access to the storage block proceeding at the processor.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Inventors: Christine Michele YOST, Elpida TZORTZATOS, Bruce Conrad GIAMEI, Timothy SLEGEL, Christian BORNTRAEGER, Damian OSISEK, Lisa Cranton HELLER, Ute GAERTNER
  • Patent number: 11403409
    Abstract: An example computer-implemented method includes presenting, by a hardware control of a computing system, an exception to an untrusted entity when the untrusted entity accesses a secure page stored in a memory of the computing system, the exception preventing the untrusted entity from accessing the secure page. The method further includes, in response to the exception, issuing, by the untrusted entity, an export call routine. The method further includes executing, by a secure interface control of the computing system, the export call routine.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: August 2, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan D. Bradbury, Martin Schwidefsky, Christian Borntraeger, Lisa Cranton Heller, Heiko Carstens, Fadi Y. Busaba
  • Publication number: 20220188412
    Abstract: Aspects include circuitry that includes a first global generation counter (GGC) that is increased upon decoding of a branch instruction and a second GGC that is increased upon a completion of the branch instruction. Upon a triggered rollback, the first GGC is reset. The circuitry also includes a generation tag memory associated with a register that receives loads during a side-channel attacks which is set to the first GGC upon a first load, and a determination unit to determine, for a second load from an address depending on the register of the first load, a generation tag value associated with the register of the second load as a function of the first GGC, the second GGC, and the generation tag value associated with the register of the first load. A wait queue is configured to block the second load, if the generation tag is larger than the second GGC.
    Type: Application
    Filed: December 15, 2020
    Publication date: June 16, 2022
    Inventors: Christian Borntraeger, Jonathan D. Bradbury, Martin Recktenwald, Anthony Saporito
  • Patent number: 11354418
    Abstract: Secure processing within a computing environment is provided by incrementally decrypting a secure operating system image, including receiving, for a page of the secure operating system image, a page address and a tweak value used during encryption of the page. Processing determines that the tweak value has not previously been used during decryption of another page of the secure operating system image, and decrypts memory page content at the page address using an image encryption key and the tweak value to facilitate obtaining a decrypted secure operating system image. Further, integrity of the secure operating system image is verified, and based on verifying integrity of the secure operating system image, execution of the decrypted secure operating system image is started.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: June 7, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Reinhard T. Buendgen, Christian Borntraeger, Jonathan D. Bradbury, Fadi Y. Busaba, Lisa C. Heller, Viktor Mihajlovski
  • Patent number: 11308215
    Abstract: A method is provided by a secure interface control of a computer that provides a partial instruction interpretation for an instruction which enables an interruption. The secure interface control fetches a program status word or a control register value from a secure guest storage. The secure interface control notifies an untrusted entity of guest interruption mask updates. The untrusted entity is executed on and in communication with hardware of the computer through the secure interface control to support operations of a secure entity executing on the untrusted entity. The secure interface control receives, from the untrusted entity, a request to present a highest priority, enabled guest interruption in response to the notifying of the guest interruption mask updates. The secure interface control moves interruption information into a guest prefix page and injecting the interruption in the secure entity when an injection of the interruption is determined to be valid.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: April 19, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christian Borntraeger, Claudio Imbrenda, Fadi Y. Busaba, Jonathan D. Bradbury, Lisa Cranton Heller
  • Patent number: 11308229
    Abstract: An example computer-implemented method includes presenting, by a hardware control of a computing system, an exception to an untrusted entity when the untrusted entity accesses a secure page stored in a memory of the computing system, the exception preventing the untrusted entity from accessing the secure page. The method further includes, in response to the exception, issuing, by the untrusted entity, an export call routine. The method further includes executing, by a secure interface control of the computing system, the export call routine.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: April 19, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan D. Bradbury, Martin Schwidefsky, Christian Borntraeger, Lisa Cranton Heller, Heiko Carstens, Fadi Y. Busaba
  • Publication number: 20220045853
    Abstract: A method, a computer system, and a computer program product for cryptography are provided. A guest virtual server registers with a trusted hypervisor by using guest credentials. A guest wrapping key associated with the guest credentials is generated. A satellite virtual server instance that shares a master key with the virtual guest server is generated in the trusted hypervisor. A copy of the guest wrapping key is passed to the satellite virtual server instance. A random guest key is wrapped with the guest wrapping key, thereby producing a wrapped guest key. The wrapped guest key is rewrapped with the master key to form a protected guest key.
    Type: Application
    Filed: October 25, 2021
    Publication date: February 10, 2022
    Inventors: Reinhard Theodor Buendgen, Christian Borntraeger
  • Publication number: 20220004499
    Abstract: According to one or more embodiments of the present invention, a computer implemented method includes receiving, at a secure interface control of a computer system, an access request for a data structure related to a secure entity in a secure domain of the computer system. The secure interface control can check for a virtual storage address associated with a location of the data structure. The secure interface control can request an address translation using a virtual address space of a non-secure entity of the computer system based on determining that the location of the data structure is associated with the virtual storage address. The secure interface control can access the data structure based on a result of the address translation.
    Type: Application
    Filed: September 15, 2021
    Publication date: January 6, 2022
    Inventors: Claudio Imbrenda, Christian Borntraeger, Lisa Cranton Heller, Fadi Y. Busaba, Jonathan D. Bradbury
  • Patent number: 11206128
    Abstract: According to one or more embodiments of the present invention, a computer implemented method includes computing a hash value of a page of memory of a computer system and comparing the hash value with a previously computed hash value of the page. A per-encryption value per page can be used in encrypting the page based on determining that the hash value matches the previously computed hash value. A modified value of the per-encryption value per page can be used in encrypting the page based on determining that the hash value mismatches the previously computed hash value.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: December 21, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan D. Bradbury, Christian Borntraeger, Heiko Carstens, Martin Schwidefsky, Reinhard Theodor Buendgen
  • Patent number: 11196548
    Abstract: A method, a computer system, and a computer program product may provide a cryptographic key object to a guest virtual server for use in cryptographic operations. The guest virtual server may register with a hypervisor. The hypervisor may generate a guest wrapping key associated with guest credentials from the registering. The hypervisor may also generate a satellite virtual server instance. The guest virtual server and the satellite virtual server instance share a master key that cannot be accessed by the hypervisor or by any guest virtual server. The trusted hypervisor may pass a copy of the guest wrapping key to the satellite virtual server instance. A random guest key may be generated and may be wrapped with a guest wrapping key thereby producing a wrapped guest key. The hypervisor may convert the wrapped guest key to be a protected key that serves as the cryptographic key object.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: December 7, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Reinhard Theodor Buendgen, Christian Borntraeger